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90 lines
3.4 KiB
Verilog
90 lines
3.4 KiB
Verilog
///////////////////////////////////////////////////////////////////////
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// File: CRC16_D16.v
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// Date: Sun Jun 17 06:42:55 2007
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//
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// Copyright (C) 1999-2003 Easics NV.
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// This source file may be used and distributed without restriction
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// provided that this copyright statement is not removed from the file
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// and that any derivative work contains the original copyright notice
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// and the associated disclaimer.
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//
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// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY EXPRESS
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// OR IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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// WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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//
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// Purpose: Verilog module containing a synthesizable CRC function
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// * polynomial: (0 5 12 16)
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// * data width: 16
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//
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// Info: tools@easics.be
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// http://www.easics.com
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///////////////////////////////////////////////////////////////////////
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module CRC16_D16
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(input [15:0] Data,
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input [15:0] CRC,
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output [15:0] NewCRC);
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assign NewCRC = nextCRC16_D16(Data,CRC);
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// polynomial: (0 5 12 16)
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// data width: 16
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// convention: the first serial data bit is D[15]
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function [15:0] nextCRC16_D16;
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input [15:0] Data;
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input [15:0] CRC;
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reg [15:0] D;
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reg [15:0] C;
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reg [15:0] NewCRC;
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begin
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D = Data;
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C = CRC;
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NewCRC[0] = D[12] ^ D[11] ^ D[8] ^ D[4] ^ D[0] ^ C[0] ^ C[4] ^
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C[8] ^ C[11] ^ C[12];
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NewCRC[1] = D[13] ^ D[12] ^ D[9] ^ D[5] ^ D[1] ^ C[1] ^ C[5] ^
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C[9] ^ C[12] ^ C[13];
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NewCRC[2] = D[14] ^ D[13] ^ D[10] ^ D[6] ^ D[2] ^ C[2] ^ C[6] ^
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C[10] ^ C[13] ^ C[14];
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NewCRC[3] = D[15] ^ D[14] ^ D[11] ^ D[7] ^ D[3] ^ C[3] ^ C[7] ^
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C[11] ^ C[14] ^ C[15];
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NewCRC[4] = D[15] ^ D[12] ^ D[8] ^ D[4] ^ C[4] ^ C[8] ^ C[12] ^
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C[15];
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NewCRC[5] = D[13] ^ D[12] ^ D[11] ^ D[9] ^ D[8] ^ D[5] ^ D[4] ^
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D[0] ^ C[0] ^ C[4] ^ C[5] ^ C[8] ^ C[9] ^ C[11] ^ C[12] ^
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C[13];
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NewCRC[6] = D[14] ^ D[13] ^ D[12] ^ D[10] ^ D[9] ^ D[6] ^ D[5] ^
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D[1] ^ C[1] ^ C[5] ^ C[6] ^ C[9] ^ C[10] ^ C[12] ^
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C[13] ^ C[14];
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NewCRC[7] = D[15] ^ D[14] ^ D[13] ^ D[11] ^ D[10] ^ D[7] ^ D[6] ^
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D[2] ^ C[2] ^ C[6] ^ C[7] ^ C[10] ^ C[11] ^ C[13] ^
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C[14] ^ C[15];
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NewCRC[8] = D[15] ^ D[14] ^ D[12] ^ D[11] ^ D[8] ^ D[7] ^ D[3] ^
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C[3] ^ C[7] ^ C[8] ^ C[11] ^ C[12] ^ C[14] ^ C[15];
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NewCRC[9] = D[15] ^ D[13] ^ D[12] ^ D[9] ^ D[8] ^ D[4] ^ C[4] ^
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C[8] ^ C[9] ^ C[12] ^ C[13] ^ C[15];
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NewCRC[10] = D[14] ^ D[13] ^ D[10] ^ D[9] ^ D[5] ^ C[5] ^ C[9] ^
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C[10] ^ C[13] ^ C[14];
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NewCRC[11] = D[15] ^ D[14] ^ D[11] ^ D[10] ^ D[6] ^ C[6] ^ C[10] ^
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C[11] ^ C[14] ^ C[15];
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NewCRC[12] = D[15] ^ D[8] ^ D[7] ^ D[4] ^ D[0] ^ C[0] ^ C[4] ^ C[7] ^
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C[8] ^ C[15];
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NewCRC[13] = D[9] ^ D[8] ^ D[5] ^ D[1] ^ C[1] ^ C[5] ^ C[8] ^ C[9];
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NewCRC[14] = D[10] ^ D[9] ^ D[6] ^ D[2] ^ C[2] ^ C[6] ^ C[9] ^ C[10];
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NewCRC[15] = D[11] ^ D[10] ^ D[7] ^ D[3] ^ C[3] ^ C[7] ^ C[10] ^
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C[11];
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nextCRC16_D16 = NewCRC;
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end
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endfunction
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endmodule
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