mirror of
https://github.com/fairwaves/UHD-Fairwaves.git
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525 lines
24 KiB
C++
525 lines
24 KiB
C++
//
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// Copyright 2011 Ettus Research LLC
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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#include "apply_corrections.hpp"
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#include "b100_impl.hpp"
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#include "b100_ctrl.hpp"
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#include "fpga_regs_standard.h"
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#include "usrp_i2c_addr.h"
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#include "usrp_commands.h"
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#include <uhd/transport/usb_control.hpp>
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#include "ctrl_packet.hpp"
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#include <uhd/utils/msg.hpp>
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#include <uhd/exception.hpp>
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#include <uhd/utils/static.hpp>
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#include <uhd/utils/images.hpp>
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#include <uhd/utils/safe_call.hpp>
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#include <boost/format.hpp>
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#include <boost/assign/list_of.hpp>
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#include <boost/filesystem.hpp>
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#include <boost/thread/thread.hpp>
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#include <boost/lexical_cast.hpp>
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#include "b100_regs.hpp"
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#include <cstdio>
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using namespace uhd;
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using namespace uhd::usrp;
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using namespace uhd::transport;
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const boost::uint16_t B100_VENDOR_ID = 0x2500;
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const boost::uint16_t B100_PRODUCT_ID = 0x0002;
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const boost::uint16_t FX2_VENDOR_ID = 0x04b4;
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const boost::uint16_t FX2_PRODUCT_ID = 0x8613;
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/***********************************************************************
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* Discovery
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**********************************************************************/
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static device_addrs_t b100_find(const device_addr_t &hint)
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{
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device_addrs_t b100_addrs;
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//return an empty list of addresses when type is set to non-b100
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if (hint.has_key("type") and hint["type"] != "b100") return b100_addrs;
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//Return an empty list of addresses when an address is specified,
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//since an address is intended for a different, non-USB, device.
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if (hint.has_key("addr")) return b100_addrs;
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unsigned int vid, pid;
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if(hint.has_key("vid") && hint.has_key("pid") && hint.has_key("type") && hint["type"] == "b100") {
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sscanf(hint.get("vid").c_str(), "%x", &vid);
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sscanf(hint.get("pid").c_str(), "%x", &pid);
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} else {
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vid = B100_VENDOR_ID;
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pid = B100_PRODUCT_ID;
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}
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// Important note:
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// The get device list calls are nested inside the for loop.
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// This allows the usb guts to decontruct when not in use,
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// so that re-enumeration after fw load can occur successfully.
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// This requirement is a courtesy of libusb1.0 on windows.
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//find the usrps and load firmware
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BOOST_FOREACH(usb_device_handle::sptr handle, usb_device_handle::get_device_list(vid, pid)) {
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//extract the firmware path for the b100
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std::string b100_fw_image;
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try{
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b100_fw_image = find_image_path(hint.get("fw", B100_FW_FILE_NAME));
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}
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catch(...){
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UHD_MSG(warning) << boost::format(
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"Could not locate B100 firmware.\n"
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"Please install the images package.\n"
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);
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return b100_addrs;
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}
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UHD_LOG << "the firmware image: " << b100_fw_image << std::endl;
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usb_control::sptr control;
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try{control = usb_control::make(handle, 0);}
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catch(const uhd::exception &){continue;} //ignore claimed
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fx2_ctrl::make(control)->usrp_load_firmware(b100_fw_image);
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}
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//get descriptors again with serial number, but using the initialized VID/PID now since we have firmware
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vid = B100_VENDOR_ID;
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pid = B100_PRODUCT_ID;
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BOOST_FOREACH(usb_device_handle::sptr handle, usb_device_handle::get_device_list(vid, pid)) {
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usb_control::sptr control;
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try{control = usb_control::make(handle, 0);}
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catch(const uhd::exception &){continue;} //ignore claimed
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fx2_ctrl::sptr fx2_ctrl = fx2_ctrl::make(control);
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const mboard_eeprom_t mb_eeprom = mboard_eeprom_t(*fx2_ctrl, mboard_eeprom_t::MAP_B100);
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device_addr_t new_addr;
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new_addr["type"] = "b100";
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new_addr["name"] = mb_eeprom["name"];
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new_addr["serial"] = handle->get_serial();
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//this is a found b100 when the hint serial and name match or blank
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if (
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(not hint.has_key("name") or hint["name"] == new_addr["name"]) and
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(not hint.has_key("serial") or hint["serial"] == new_addr["serial"])
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){
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b100_addrs.push_back(new_addr);
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}
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}
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return b100_addrs;
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}
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/***********************************************************************
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* Make
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**********************************************************************/
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static device::sptr b100_make(const device_addr_t &device_addr){
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return device::sptr(new b100_impl(device_addr));
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}
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UHD_STATIC_BLOCK(register_b100_device){
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device::register_device(&b100_find, &b100_make);
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}
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/***********************************************************************
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* Structors
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**********************************************************************/
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b100_impl::b100_impl(const device_addr_t &device_addr){
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_tree = property_tree::make();
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//extract the FPGA path for the B100
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std::string b100_fpga_image = find_image_path(
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device_addr.has_key("fpga")? device_addr["fpga"] : B100_FPGA_FILE_NAME
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);
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//try to match the given device address with something on the USB bus
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std::vector<usb_device_handle::sptr> device_list =
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usb_device_handle::get_device_list(B100_VENDOR_ID, B100_PRODUCT_ID);
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//locate the matching handle in the device list
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usb_device_handle::sptr handle;
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BOOST_FOREACH(usb_device_handle::sptr dev_handle, device_list) {
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if (dev_handle->get_serial() == device_addr["serial"]){
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handle = dev_handle;
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break;
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}
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}
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UHD_ASSERT_THROW(handle.get() != NULL); //better be found
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//create control objects
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usb_control::sptr fx2_transport = usb_control::make(handle, 0);
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_fx2_ctrl = fx2_ctrl::make(fx2_transport);
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this->check_fw_compat(); //check after making fx2
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//-- setup clock after making fx2 and before loading fpga --//
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_clock_ctrl = b100_clock_ctrl::make(_fx2_ctrl, device_addr.cast<double>("master_clock_rate", B100_DEFAULT_TICK_RATE));
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_fx2_ctrl->usrp_load_fpga(b100_fpga_image);
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//create the control transport
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device_addr_t ctrl_xport_args;
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ctrl_xport_args["recv_frame_size"] = boost::lexical_cast<std::string>(CTRL_PACKET_LENGTH);
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ctrl_xport_args["num_recv_frames"] = "16";
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ctrl_xport_args["send_frame_size"] = boost::lexical_cast<std::string>(CTRL_PACKET_LENGTH);
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ctrl_xport_args["num_send_frames"] = "4";
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_ctrl_transport = usb_zero_copy::make(
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handle,
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4, 8, //interface, endpoint
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3, 4, //interface, endpoint
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ctrl_xport_args
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);
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////////////////////////////////////////////////////////////////////
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// Create controller objects
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////////////////////////////////////////////////////////////////////
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_fpga_ctrl = b100_ctrl::make(_ctrl_transport);
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this->enable_gpif(true); //TODO best place to put this?
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this->check_fpga_compat(); //check after making control
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////////////////////////////////////////////////////////////////////
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// Reset buffers in data path
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////////////////////////////////////////////////////////////////////
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_fpga_ctrl->poke32(B100_REG_GLOBAL_RESET, 0);
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_fpga_ctrl->poke32(B100_REG_CLEAR_RX, 0);
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_fpga_ctrl->poke32(B100_REG_CLEAR_TX, 0);
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this->reset_gpif(6);
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////////////////////////////////////////////////////////////////////
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// Initialize peripherals after reset
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////////////////////////////////////////////////////////////////////
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_fpga_i2c_ctrl = i2c_core_100::make(_fpga_ctrl, B100_REG_SLAVE(3));
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_fpga_spi_ctrl = spi_core_100::make(_fpga_ctrl, B100_REG_SLAVE(2));
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////////////////////////////////////////////////////////////////////
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// Create data transport
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// This happens after FPGA ctrl instantiated so any junk that might
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// be in the FPGAs buffers doesn't get pulled into the transport
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// before being cleared.
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////////////////////////////////////////////////////////////////////
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device_addr_t data_xport_args;
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data_xport_args["recv_frame_size"] = device_addr.get("recv_frame_size", "16384");
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data_xport_args["num_recv_frames"] = device_addr.get("num_recv_frames", "16");
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data_xport_args["send_frame_size"] = device_addr.get("send_frame_size", "16384");
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data_xport_args["num_send_frames"] = device_addr.get("num_send_frames", "16");
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_data_transport = usb_zero_copy::make_wrapper(
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usb_zero_copy::make(
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handle, // identifier
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2, 6, // IN interface, endpoint
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1, 2, // OUT interface, endpoint
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data_xport_args // param hints
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)
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);
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////////////////////////////////////////////////////////////////////
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// Initialize the properties tree
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////////////////////////////////////////////////////////////////////
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_tree->create<std::string>("/name").set("B-Series Device");
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const fs_path mb_path = "/mboards/0";
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_tree->create<std::string>(mb_path / "name").set("B100 (B-Hundo)");
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_tree->create<std::string>(mb_path / "load_eeprom")
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.subscribe(boost::bind(&fx2_ctrl::usrp_load_eeprom, _fx2_ctrl, _1));
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////////////////////////////////////////////////////////////////////
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// setup the mboard eeprom
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////////////////////////////////////////////////////////////////////
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const mboard_eeprom_t mb_eeprom(*_fx2_ctrl, mboard_eeprom_t::MAP_B100);
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_tree->create<mboard_eeprom_t>(mb_path / "eeprom")
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.set(mb_eeprom)
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.subscribe(boost::bind(&b100_impl::set_mb_eeprom, this, _1));
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////////////////////////////////////////////////////////////////////
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// create clock control objects
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////////////////////////////////////////////////////////////////////
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//^^^ clock created up top, just reg props here... ^^^
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_tree->create<double>(mb_path / "tick_rate")
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.publish(boost::bind(&b100_clock_ctrl::get_fpga_clock_rate, _clock_ctrl))
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.subscribe(boost::bind(&b100_impl::update_tick_rate, this, _1));
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////////////////////////////////////////////////////////////////////
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// create codec control objects
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////////////////////////////////////////////////////////////////////
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_codec_ctrl = b100_codec_ctrl::make(_fpga_spi_ctrl);
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const fs_path rx_codec_path = mb_path / "rx_codecs/A";
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const fs_path tx_codec_path = mb_path / "tx_codecs/A";
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_tree->create<std::string>(rx_codec_path / "name").set("ad9522");
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_tree->create<meta_range_t>(rx_codec_path / "gains/pga/range").set(b100_codec_ctrl::rx_pga_gain_range);
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_tree->create<double>(rx_codec_path / "gains/pga/value")
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.coerce(boost::bind(&b100_impl::update_rx_codec_gain, this, _1));
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_tree->create<std::string>(tx_codec_path / "name").set("ad9522");
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_tree->create<meta_range_t>(tx_codec_path / "gains/pga/range").set(b100_codec_ctrl::tx_pga_gain_range);
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_tree->create<double>(tx_codec_path / "gains/pga/value")
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.subscribe(boost::bind(&b100_codec_ctrl::set_tx_pga_gain, _codec_ctrl, _1))
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.publish(boost::bind(&b100_codec_ctrl::get_tx_pga_gain, _codec_ctrl));
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////////////////////////////////////////////////////////////////////
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// and do the misc mboard sensors
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////////////////////////////////////////////////////////////////////
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_tree->create<sensor_value_t>(mb_path / "sensors/ref_locked")
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.publish(boost::bind(&b100_impl::get_ref_locked, this));
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////////////////////////////////////////////////////////////////////
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// create frontend control objects
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////////////////////////////////////////////////////////////////////
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_rx_fe = rx_frontend_core_200::make(_fpga_ctrl, B100_REG_SR_ADDR(B100_SR_RX_FRONT));
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_tx_fe = tx_frontend_core_200::make(_fpga_ctrl, B100_REG_SR_ADDR(B100_SR_TX_FRONT));
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_tree->create<subdev_spec_t>(mb_path / "rx_subdev_spec")
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.subscribe(boost::bind(&b100_impl::update_rx_subdev_spec, this, _1));
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_tree->create<subdev_spec_t>(mb_path / "tx_subdev_spec")
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.subscribe(boost::bind(&b100_impl::update_tx_subdev_spec, this, _1));
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const fs_path rx_fe_path = mb_path / "rx_frontends" / "A";
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const fs_path tx_fe_path = mb_path / "tx_frontends" / "A";
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_tree->create<std::complex<double> >(rx_fe_path / "dc_offset" / "value")
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.coerce(boost::bind(&rx_frontend_core_200::set_dc_offset, _rx_fe, _1))
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.set(std::complex<double>(0.0, 0.0));
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_tree->create<bool>(rx_fe_path / "dc_offset" / "enable")
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.subscribe(boost::bind(&rx_frontend_core_200::set_dc_offset_auto, _rx_fe, _1))
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.set(true);
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_tree->create<std::complex<double> >(rx_fe_path / "iq_balance" / "value")
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.subscribe(boost::bind(&rx_frontend_core_200::set_iq_balance, _rx_fe, _1))
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.set(std::polar<double>(1.0, 0.0));
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_tree->create<std::complex<double> >(tx_fe_path / "dc_offset" / "value")
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.coerce(boost::bind(&tx_frontend_core_200::set_dc_offset, _tx_fe, _1))
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.set(std::complex<double>(0.0, 0.0));
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_tree->create<std::complex<double> >(tx_fe_path / "iq_balance" / "value")
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.subscribe(boost::bind(&tx_frontend_core_200::set_iq_balance, _tx_fe, _1))
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.set(std::polar<double>(1.0, 0.0));
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////////////////////////////////////////////////////////////////////
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// create rx dsp control objects
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////////////////////////////////////////////////////////////////////
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_rx_dsps.push_back(rx_dsp_core_200::make(
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_fpga_ctrl, B100_REG_SR_ADDR(B100_SR_RX_DSP0), B100_REG_SR_ADDR(B100_SR_RX_CTRL0), B100_RX_SID_BASE + 0
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));
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_rx_dsps.push_back(rx_dsp_core_200::make(
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_fpga_ctrl, B100_REG_SR_ADDR(B100_SR_RX_DSP1), B100_REG_SR_ADDR(B100_SR_RX_CTRL1), B100_RX_SID_BASE + 1
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));
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for (size_t dspno = 0; dspno < _rx_dsps.size(); dspno++){
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_rx_dsps[dspno]->set_link_rate(B100_LINK_RATE_BPS);
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_tree->access<double>(mb_path / "tick_rate")
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.subscribe(boost::bind(&rx_dsp_core_200::set_tick_rate, _rx_dsps[dspno], _1));
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fs_path rx_dsp_path = mb_path / str(boost::format("rx_dsps/%u") % dspno);
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_tree->create<meta_range_t>(rx_dsp_path / "rate/range")
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.publish(boost::bind(&rx_dsp_core_200::get_host_rates, _rx_dsps[dspno]));
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_tree->create<double>(rx_dsp_path / "rate/value")
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.set(1e6) //some default
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.coerce(boost::bind(&rx_dsp_core_200::set_host_rate, _rx_dsps[dspno], _1))
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.subscribe(boost::bind(&b100_impl::update_rx_samp_rate, this, dspno, _1));
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_tree->create<double>(rx_dsp_path / "freq/value")
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.coerce(boost::bind(&rx_dsp_core_200::set_freq, _rx_dsps[dspno], _1));
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_tree->create<meta_range_t>(rx_dsp_path / "freq/range")
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.publish(boost::bind(&rx_dsp_core_200::get_freq_range, _rx_dsps[dspno]));
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_tree->create<stream_cmd_t>(rx_dsp_path / "stream_cmd")
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.subscribe(boost::bind(&rx_dsp_core_200::issue_stream_command, _rx_dsps[dspno], _1));
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}
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////////////////////////////////////////////////////////////////////
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// create tx dsp control objects
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////////////////////////////////////////////////////////////////////
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_tx_dsp = tx_dsp_core_200::make(
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_fpga_ctrl, B100_REG_SR_ADDR(B100_SR_TX_DSP), B100_REG_SR_ADDR(B100_SR_TX_CTRL), B100_TX_ASYNC_SID
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);
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_tx_dsp->set_link_rate(B100_LINK_RATE_BPS);
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_tree->access<double>(mb_path / "tick_rate")
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.subscribe(boost::bind(&tx_dsp_core_200::set_tick_rate, _tx_dsp, _1));
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_tree->create<meta_range_t>(mb_path / "tx_dsps/0/rate/range")
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.publish(boost::bind(&tx_dsp_core_200::get_host_rates, _tx_dsp));
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_tree->create<double>(mb_path / "tx_dsps/0/rate/value")
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.set(1e6) //some default
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.coerce(boost::bind(&tx_dsp_core_200::set_host_rate, _tx_dsp, _1))
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.subscribe(boost::bind(&b100_impl::update_tx_samp_rate, this, 0, _1));
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_tree->create<double>(mb_path / "tx_dsps/0/freq/value")
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.coerce(boost::bind(&tx_dsp_core_200::set_freq, _tx_dsp, _1));
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_tree->create<meta_range_t>(mb_path / "tx_dsps/0/freq/range")
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.publish(boost::bind(&tx_dsp_core_200::get_freq_range, _tx_dsp));
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////////////////////////////////////////////////////////////////////
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// create time control objects
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////////////////////////////////////////////////////////////////////
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time64_core_200::readback_bases_type time64_rb_bases;
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time64_rb_bases.rb_secs_now = B100_REG_RB_TIME_NOW_SECS;
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time64_rb_bases.rb_ticks_now = B100_REG_RB_TIME_NOW_TICKS;
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time64_rb_bases.rb_secs_pps = B100_REG_RB_TIME_PPS_SECS;
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time64_rb_bases.rb_ticks_pps = B100_REG_RB_TIME_PPS_TICKS;
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_time64 = time64_core_200::make(
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_fpga_ctrl, B100_REG_SR_ADDR(B100_SR_TIME64), time64_rb_bases
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);
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_tree->access<double>(mb_path / "tick_rate")
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.subscribe(boost::bind(&time64_core_200::set_tick_rate, _time64, _1));
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_tree->create<time_spec_t>(mb_path / "time/now")
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.publish(boost::bind(&time64_core_200::get_time_now, _time64))
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.subscribe(boost::bind(&time64_core_200::set_time_now, _time64, _1));
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_tree->create<time_spec_t>(mb_path / "time/pps")
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.publish(boost::bind(&time64_core_200::get_time_last_pps, _time64))
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.subscribe(boost::bind(&time64_core_200::set_time_next_pps, _time64, _1));
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//setup time source props
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_tree->create<std::string>(mb_path / "time_source/value")
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.subscribe(boost::bind(&time64_core_200::set_time_source, _time64, _1));
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_tree->create<std::vector<std::string> >(mb_path / "time_source/options")
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.publish(boost::bind(&time64_core_200::get_time_sources, _time64));
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//setup reference source props
|
|
_tree->create<std::string>(mb_path / "clock_source/value")
|
|
.subscribe(boost::bind(&b100_impl::update_clock_source, this, _1));
|
|
static const std::vector<std::string> clock_sources = boost::assign::list_of("internal")("external")("auto");
|
|
_tree->create<std::vector<std::string> >(mb_path / "clock_source/options").set(clock_sources);
|
|
|
|
////////////////////////////////////////////////////////////////////
|
|
// create dboard control objects
|
|
////////////////////////////////////////////////////////////////////
|
|
|
|
//read the dboard eeprom to extract the dboard ids
|
|
dboard_eeprom_t rx_db_eeprom, tx_db_eeprom, gdb_eeprom;
|
|
rx_db_eeprom.load(*_fpga_i2c_ctrl, I2C_ADDR_RX_A);
|
|
tx_db_eeprom.load(*_fpga_i2c_ctrl, I2C_ADDR_TX_A);
|
|
gdb_eeprom.load(*_fpga_i2c_ctrl, I2C_ADDR_TX_A ^ 5);
|
|
|
|
//create the properties and register subscribers
|
|
_tree->create<dboard_eeprom_t>(mb_path / "dboards/A/rx_eeprom")
|
|
.set(rx_db_eeprom)
|
|
.subscribe(boost::bind(&b100_impl::set_db_eeprom, this, "rx", _1));
|
|
_tree->create<dboard_eeprom_t>(mb_path / "dboards/A/tx_eeprom")
|
|
.set(tx_db_eeprom)
|
|
.subscribe(boost::bind(&b100_impl::set_db_eeprom, this, "tx", _1));
|
|
_tree->create<dboard_eeprom_t>(mb_path / "dboards/A/gdb_eeprom")
|
|
.set(gdb_eeprom)
|
|
.subscribe(boost::bind(&b100_impl::set_db_eeprom, this, "gdb", _1));
|
|
|
|
//create a new dboard interface and manager
|
|
_dboard_iface = make_b100_dboard_iface(_fpga_ctrl, _fpga_i2c_ctrl, _fpga_spi_ctrl, _clock_ctrl, _codec_ctrl);
|
|
_tree->create<dboard_iface::sptr>(mb_path / "dboards/A/iface").set(_dboard_iface);
|
|
_dboard_manager = dboard_manager::make(
|
|
rx_db_eeprom.id, tx_db_eeprom.id, gdb_eeprom.id,
|
|
_dboard_iface, _tree->subtree(mb_path / "dboards/A")
|
|
);
|
|
|
|
//bind frontend corrections to the dboard freq props
|
|
const fs_path db_tx_fe_path = mb_path / "dboards" / "A" / "tx_frontends";
|
|
BOOST_FOREACH(const std::string &name, _tree->list(db_tx_fe_path)){
|
|
_tree->access<double>(db_tx_fe_path / name / "freq" / "value")
|
|
.subscribe(boost::bind(&b100_impl::set_tx_fe_corrections, this, _1));
|
|
}
|
|
const fs_path db_rx_fe_path = mb_path / "dboards" / "A" / "rx_frontends";
|
|
BOOST_FOREACH(const std::string &name, _tree->list(db_rx_fe_path)){
|
|
_tree->access<double>(db_rx_fe_path / name / "freq" / "value")
|
|
.subscribe(boost::bind(&b100_impl::set_rx_fe_corrections, this, _1));
|
|
}
|
|
|
|
//initialize io handling
|
|
this->io_init();
|
|
|
|
////////////////////////////////////////////////////////////////////
|
|
// do some post-init tasks
|
|
////////////////////////////////////////////////////////////////////
|
|
this->update_rates();
|
|
|
|
_tree->access<double>(mb_path / "tick_rate") //now subscribe the clock rate setter
|
|
.subscribe(boost::bind(&b100_clock_ctrl::set_fpga_clock_rate, _clock_ctrl, _1));
|
|
|
|
_tree->access<subdev_spec_t>(mb_path / "rx_subdev_spec").set(subdev_spec_t("A:" + _tree->list(mb_path / "dboards/A/rx_frontends").at(0)));
|
|
_tree->access<subdev_spec_t>(mb_path / "tx_subdev_spec").set(subdev_spec_t("A:" + _tree->list(mb_path / "dboards/A/tx_frontends").at(0)));
|
|
_tree->access<std::string>(mb_path / "clock_source/value").set("internal");
|
|
_tree->access<std::string>(mb_path / "time_source/value").set("none");
|
|
}
|
|
|
|
b100_impl::~b100_impl(void){
|
|
//set an empty async callback now that we deconstruct
|
|
_fpga_ctrl->set_async_cb(b100_ctrl::async_cb_type());
|
|
}
|
|
|
|
void b100_impl::check_fw_compat(void){
|
|
unsigned char data[4]; //useless data buffer
|
|
const boost::uint16_t fw_compat_num = _fx2_ctrl->usrp_control_read(
|
|
VRQ_FW_COMPAT, 0, 0, data, sizeof(data)
|
|
);
|
|
if (fw_compat_num != B100_FW_COMPAT_NUM){
|
|
throw uhd::runtime_error(str(boost::format(
|
|
"Expected firmware compatibility number 0x%x, but got 0x%x:\n"
|
|
"The firmware build is not compatible with the host code build."
|
|
) % B100_FW_COMPAT_NUM % fw_compat_num));
|
|
}
|
|
}
|
|
|
|
void b100_impl::check_fpga_compat(void){
|
|
const boost::uint32_t fpga_compat_num = _fpga_ctrl->peek32(B100_REG_RB_COMPAT);
|
|
boost::uint16_t fpga_major = fpga_compat_num >> 16, fpga_minor = fpga_compat_num & 0xffff;
|
|
if (fpga_major == 0){ //old version scheme
|
|
fpga_major = fpga_minor;
|
|
fpga_minor = 0;
|
|
}
|
|
if (fpga_major != B100_FPGA_COMPAT_NUM){
|
|
throw uhd::runtime_error(str(boost::format(
|
|
"Expected FPGA compatibility number %d, but got %d:\n"
|
|
"The FPGA build is not compatible with the host code build."
|
|
) % int(B100_FPGA_COMPAT_NUM) % fpga_major));
|
|
}
|
|
_tree->create<std::string>("/mboards/0/fpga_version").set(str(boost::format("%u.%u") % fpga_major % fpga_minor));
|
|
}
|
|
|
|
double b100_impl::update_rx_codec_gain(const double gain){
|
|
//set gain on both I and Q, readback on one
|
|
//TODO in the future, gains should have individual control
|
|
_codec_ctrl->set_rx_pga_gain(gain, 'A');
|
|
_codec_ctrl->set_rx_pga_gain(gain, 'B');
|
|
return _codec_ctrl->get_rx_pga_gain('A');
|
|
}
|
|
|
|
void b100_impl::set_mb_eeprom(const uhd::usrp::mboard_eeprom_t &mb_eeprom){
|
|
mb_eeprom.commit(*_fx2_ctrl, mboard_eeprom_t::MAP_B100);
|
|
}
|
|
|
|
void b100_impl::set_db_eeprom(const std::string &type, const uhd::usrp::dboard_eeprom_t &db_eeprom){
|
|
if (type == "rx") db_eeprom.store(*_fpga_i2c_ctrl, I2C_ADDR_RX_A);
|
|
if (type == "tx") db_eeprom.store(*_fpga_i2c_ctrl, I2C_ADDR_TX_A);
|
|
if (type == "gdb") db_eeprom.store(*_fpga_i2c_ctrl, I2C_ADDR_TX_A ^ 5);
|
|
}
|
|
|
|
void b100_impl::update_clock_source(const std::string &source){
|
|
if (source == "auto") _clock_ctrl->use_auto_ref();
|
|
else if (source == "internal") _clock_ctrl->use_internal_ref();
|
|
else if (source == "external") _clock_ctrl->use_external_ref();
|
|
else throw uhd::runtime_error("unhandled clock configuration reference source: " + source);
|
|
}
|
|
|
|
////////////////// some GPIF preparation related stuff /////////////////
|
|
void b100_impl::reset_gpif(const boost::uint16_t ep) {
|
|
_fx2_ctrl->usrp_control_write(VRQ_RESET_GPIF, ep, ep, 0, 0);
|
|
}
|
|
|
|
void b100_impl::enable_gpif(const bool en) {
|
|
_fx2_ctrl->usrp_control_write(VRQ_ENABLE_GPIF, en ? 1 : 0, 0, 0, 0);
|
|
}
|
|
|
|
void b100_impl::clear_fpga_fifo(void) {
|
|
_fx2_ctrl->usrp_control_write(VRQ_CLEAR_FPGA_FIFO, 0, 0, 0, 0);
|
|
}
|
|
|
|
sensor_value_t b100_impl::get_ref_locked(void){
|
|
const bool lock = _clock_ctrl->get_locked();
|
|
return sensor_value_t("Ref", lock, "locked", "unlocked");
|
|
}
|
|
|
|
void b100_impl::set_rx_fe_corrections(const double lo_freq){
|
|
apply_rx_fe_corrections(this->get_tree()->subtree("/mboards/0"), "A", lo_freq);
|
|
}
|
|
|
|
void b100_impl::set_tx_fe_corrections(const double lo_freq){
|
|
apply_tx_fe_corrections(this->get_tree()->subtree("/mboards/0"), "A", lo_freq);
|
|
}
|