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64 lines
1.1 KiB
Makefile
64 lines
1.1 KiB
Makefile
#
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# Copyright 2010-2012 Ettus Research LLC
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#
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##################################################
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# Control Lib Sources
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##################################################
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CONTROL_LIB_SRCS = $(abspath $(addprefix $(BASE_DIR)/../control_lib/, \
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CRC16_D16.v \
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atr_controller.v \
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bin2gray.v \
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dcache.v \
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decoder_3_8.v \
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dbsm.v \
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dpram32.v \
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double_buffer.v \
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gray2bin.v \
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gray_send.v \
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icache.v \
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mux4.v \
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mux8.v \
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nsgpio.v \
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ram_2port.v \
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ram_harv_cache.v \
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ram_harvard.v \
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ram_harvard2.v \
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ram_loader.v \
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setting_reg.v \
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settings_bus.v \
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settings_bus_crossclock.v \
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srl.v \
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system_control.v \
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wb_1master.v \
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wb_readback_mux.v \
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wb_readback_mux_16LE.v \
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quad_uart.v \
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simple_uart.v \
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simple_uart_tx.v \
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simple_uart_rx.v \
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oneshot_2clk.v \
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sd_spi.v \
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sd_spi_wb.v \
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wb_bridge_16_32.v \
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reset_sync.v \
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priority_enc.v \
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pic.v \
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longfifo.v \
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shortfifo.v \
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medfifo.v \
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s3a_icap_wb.v \
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s6_icap_wb.v \
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bootram.v \
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nsgpio16LE.v \
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settings_bus_16LE.v \
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atr_controller16.v \
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fifo_to_wb.v \
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gpio_atr.v \
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user_settings.v \
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settings_fifo_ctrl.v \
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simple_spi_core.v \
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axis_spi_core.v \
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simple_i2c_core.v \
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))
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