Josh Blum 0a3dd778d0 umtrx: slow down icap clock, this image resets reliably ...

Looks like icap clk from the pll is shared with the frontend clock.
So instead I opted to divide the icap clk down inside s6_icap_wb.v.
The image checked in reset reliably after many trials,
which is a good sign that this may be an acceptable fix.

2015-04-01 00:45:00 -07:00

..

u2plus_umtrx_v2_4ddc.bin

umtrx: update fpga images for led fix

2014-10-27 16:52:50 -04:00

u2plus_umtrx_v2_test_pa.bin

update fpga & zpu images

2015-03-12 21:01:44 +03:00

u2plus_umtrx_v2.bin

umtrx: slow down icap clock, this image resets reliably

2015-04-01 00:45:00 -07:00

umtrx_txrx_uhd.bin

zpu: move spi mask into spi.c

2015-03-24 01:00:05 -07:00