mirror of
https://github.com/fairwaves/openbts-2.8.git
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9704fa28e7
git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@3457 19bc5d8c-e614-43d4-8b26-e1612bc8e597
14 lines
306 B
Verilog
14 lines
306 B
Verilog
fifo_4kx16_dc fifo_4kx16_dc_inst (
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.aclr ( aclr_sig ),
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.data ( data_sig ),
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.rdclk ( rdclk_sig ),
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.rdreq ( rdreq_sig ),
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.wrclk ( wrclk_sig ),
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.wrreq ( wrreq_sig ),
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.q ( q_sig ),
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.rdempty ( rdempty_sig ),
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.rdusedw ( rdusedw_sig ),
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.wrfull ( wrfull_sig ),
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.wrusedw ( wrusedw_sig )
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);
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