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uhd: only the E100 supports FPGA timestamps and adjustable clock rate
Signed-off-by: Thomas Tsou <ttsou@vt.edu> git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2636 19bc5d8c-e614-43d4-8b26-e1612bc8e597
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@@ -282,8 +282,8 @@ bool uhd_device::open()
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{
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LOG(INFO) << "creating USRP device...";
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// Use the first available USRP2 / N210
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uhd::device_addr_t dev_addr("type=usrp2");
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// Use the first available USRP E100
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uhd::device_addr_t dev_addr("type=usrp-e");
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try {
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usrp_dev = uhd::usrp::single_usrp::make(dev_addr);
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}
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