Files
openbts/TransceiverRAD1/fpga/inband_lib/usb_fifo_reader.v
Harvind Samra 2f40797d0f FPGA source code.
git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@3457 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2012-04-15 05:11:26 +00:00

25 lines
493 B
Verilog

module usb_fifo_reader (
input usbclk,
input bus_reset,
input RD,
output rdreq,
);
// FX2 Bug Fix
reg [8:0] read_count;
always @(negedge usbclk)
if(bus_reset)
read_count <= #1 9'd0;
else if(RD & ~read_count[8])
read_count <= #1 read_count + 9'd1;
else
read_count <= #1 RD ? read_count : 9'b0;
assign rdreq = RD & ~read_count[8];
endmodule