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git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@3457 19bc5d8c-e614-43d4-8b26-e1612bc8e597
14 lines
303 B
Verilog
14 lines
303 B
Verilog
// -*- verilog -*-
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// Range Networks
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// Unsigned 16-bit greater or equal comparator.
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// for test module
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module testcompar
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(
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input usbdata_packed[31:0],
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output reg test_bit1
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);
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usbdata_packed[15:0] A;
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usbdata_packed[31:16] B;
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assign test_bit1 = A == B ? 1'b1 : 1'b0;
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endmodule
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