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https://github.com/RangeNetworks/openbts.git
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5289a229d9
git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@6168 19bc5d8c-e614-43d4-8b26-e1612bc8e597
52 lines
2.2 KiB
C
52 lines
2.2 KiB
C
// I2C addresses
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#define I2C_DEV_EEPROM 0x50 // 24LC02[45]: 7-bits 1010xxx
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#define I2C_ADDR_BOOT (I2C_DEV_EEPROM | 0x0)
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#define I2C_ADDR_TX_A (I2C_DEV_EEPROM | 0x4)
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#define I2C_ADDR_RX_A (I2C_DEV_EEPROM | 0x5)
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#define I2C_ADDR_TX_B (I2C_DEV_EEPROM | 0x6)
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#define I2C_ADDR_RX_B (I2C_DEV_EEPROM | 0x7)
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// format of FX2 BOOT EEPROM
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// 00: 0xC0 code for ``Read IDs from EEPROM''
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// 01: 0xFE USB Vendor ID (LSB)
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// 02: 0xFF USB Vendor ID (MSB)
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// 03: 0x02 USB Product ID (LSB)
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// 04: 0x00 USB Product ID (MSB)
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// 05: 0x01 USB Device ID (LSB) // rev1
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// 06: 0x00 USB Device ID (MSB) // 0 = unconfig'd (no firmware)
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// 07: 0x00 option byte
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// format of daughterboard EEPROM
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// 00: 0xDB code for ``I'm a daughterboard''
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// 01: .. Daughterboard ID (LSB)
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// 02: .. Daughterboard ID (MSB)
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// 03: .. io bits 7-0 direction (bit set if it's an output from m'board)
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// 04: .. io bits 15-8 direction (bit set if it's an output from m'board)
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// 05: .. ADC0 DC offset correction (LSB)
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// 06: .. ADC0 DC offset correction (MSB)
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// 07: .. ADC1 DC offset correction (LSB)
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// 08: .. ADC1 DC offset correction (MSB)
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// ...
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// 1f: .. negative of the sum of bytes [0x00, 0x1e]
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#define DB_EEPROM_MAGIC 0x00
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#define DB_EEPROM_MAGIC_VALUE 0xDB
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#define DB_EEPROM_ID_LSB 0x01
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#define DB_EEPROM_ID_MSB 0x02
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#define DB_EEPROM_OE_LSB 0x03
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#define DB_EEPROM_OE_MSB 0x04
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#define DB_EEPROM_OFFSET_0_LSB 0x05 // offset correction for ADC or DAC 0
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#define DB_EEPROM_OFFSET_0_MSB 0x06
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#define DB_EEPROM_OFFSET_1_LSB 0x07 // offset correction for ADC or DAC 1
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#define DB_EEPROM_OFFSET_1_MSB 0x08
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#define DB_EEPROM_CHKSUM 0x1f
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#define DB_EEPROM_CLEN 0x20 // length of common portion of eeprom
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#define DB_EEPROM_CUSTOM_BASE DB_EEPROM_CLEN // first avail offset for
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// daughterboard specific use
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