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7e4e536b1b
Similar to the existing Intel SSE cases, add support for NEON vector floating point SIMD processing. In this case, use ARM assembly directly as the NEON intrinsics do not generate preferential code output. Currently support NEON vectorized convolution and floating point integer conversions. Signed-off-by: Thomas Tsou <tom@tsou.cc>
7 lines
127 B
C
7 lines
127 B
C
#ifndef _SCALE_H_
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#define _SCALE_H_
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void scale_complex(float *out, float *in, float *scale, int len);
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#endif /* _SCALE_H_ */
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