paulmataruso/UHD-Fairwaves
1
0
Fork 0
mirror of https://github.com/fairwaves/UHD-Fairwaves.git synced 2025-10-23 07:42:00 +00:00
Code Issues Packages Projects Releases Wiki Activity

umtrx: fix typo in settings bus assign

Browse Source
This commit is contained in:
Josh Blum
2014-04-21 16:40:40 -07:00
parent 640043a6e3
commit c9e8839e09
2 changed files with 10 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
fpga/top/UmTRX/umtrx_core.v
View File

@@ -708,7 +708,7 @@ module umtrx_core
.dsp_clk(dsp_clk), .dsp_rst(dsp_rst),
.fe_clk(fe_clk), .fe_rst(fe_rst),
.set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_dsp), .set_data_fe(set_data_fe),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
.front_i(rx_fe_sw[0]?front1_i:front0_i),
.front_q(rx_fe_sw[0]?front1_q:front0_q),
.adc_stb(rx_fe_sw[0]?adc1_strobe:adc0_strobe),
@@ -731,7 +731,7 @@ module umtrx_core
.dsp_clk(dsp_clk), .dsp_rst(dsp_rst),
.fe_clk(fe_clk), .fe_rst(fe_rst),
.set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_dsp), .set_data_fe(set_data_fe),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
.front_i(rx_fe_sw[1]?front1_i:front0_i),
.front_q(rx_fe_sw[1]?front1_q:front0_q),
.adc_stb(rx_fe_sw[1]?adc1_strobe:adc0_strobe),
@@ -759,7 +759,7 @@ assign dsp_rx1_valid = 0;
.dsp_clk(dsp_clk), .dsp_rst(dsp_rst),
.fe_clk(fe_clk), .fe_rst(fe_rst),
.set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_dsp), .set_data_fe(set_data_fe),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
.front_i(rx_fe_sw[2]?front1_i:front0_i),
.front_q(rx_fe_sw[2]?front1_q:front0_q),
.adc_stb(rx_fe_sw[2]?adc1_strobe:adc0_strobe),
@@ -782,7 +782,7 @@ assign dsp_rx1_valid = 0;
.dsp_clk(dsp_clk), .dsp_rst(dsp_rst),
.fe_clk(fe_clk), .fe_rst(fe_rst),
.set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_dsp), .set_data_fe(set_data_fe),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
.front_i(rx_fe_sw[3]?front1_i:front0_i),
.front_q(rx_fe_sw[3]?front1_q:front0_q),
.adc_stb(rx_fe_sw[3]?adc1_strobe:adc0_strobe),
@@ -817,7 +817,7 @@ assign dsp_rx3_valid = 0;
.dsp_clk(dsp_clk), .dsp_rst(dsp_rst),
.fe_clk(fe_clk), .fe_rst(fe_rst),
.set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_dsp), .set_data_fe(set_data_fe),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
.dac_a(dac0_a), .dac_b(dac0_b), .dac_stb(dac0_strobe), .run(run_tx0),
.vita_data_sys(sram0_data), .vita_valid_sys(sram0_valid), .vita_ready_sys(sram0_ready),
.err_data_sys(err_tx0_data), .err_valid_sys(err_tx0_valid), .err_ready_sys(err_tx0_ready),
@@ -839,7 +839,7 @@ assign dsp_rx3_valid = 0;
.dsp_clk(dsp_clk), .dsp_rst(dsp_rst),
.fe_clk(fe_clk), .fe_rst(fe_rst),
.set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_dsp), .set_data_fe(set_data_fe),
.set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
.dac_a(dac1_a), .dac_b(dac1_b), .dac_stb(dac1_strobe), .run(run_tx1),
.vita_data_sys(sram1_data), .vita_valid_sys(sram1_valid), .vita_ready_sys(sram1_ready),
.err_data_sys(err_tx1_data), .err_valid_sys(err_tx1_valid), .err_ready_sys(err_tx1_ready),

4
host/umtrx_test_chains.cpp
View File

@@ -188,11 +188,13 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
//test tx chains
for (size_t i = 0; i < 2; i++)
{
std::cout << "TX test with DSP " << i << std::endl;
uhd::stream_args_t stream_args("fc32");
stream_args.channels.push_back(i);
test_tx_chain(usrp, stream_args, ampl, begin_delta, num_samps);
}
{
std::cout << "TX test dual DSP " << std::endl;
uhd::stream_args_t stream_args("fc32");
stream_args.channels.push_back(0);
stream_args.channels.push_back(1);
@@ -202,11 +204,13 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
//test rx chains
for (size_t i = 0; i < 2; i++)
{
std::cout << "RX test with DSP " << i << std::endl;
uhd::stream_args_t stream_args("fc32");
stream_args.channels.push_back(i);
test_rx_chain(usrp, stream_args, begin_delta, num_samps);
}
{
std::cout << "RX test dual DSP " << std::endl;
uhd::stream_args_t stream_args("fc32");
stream_args.channels.push_back(0);
stream_args.channels.push_back(1);