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Similar to the existing Intel SSE cases, add support for NEON vector floating point SIMD processing. In this case, use ARM assembly directly as the NEON intrinsics do not generate preferential code output. Currently support NEON vectorized convolution and floating point integer conversions. Signed-off-by: Thomas Tsou <tom@tsou.cc>
3.5 KiB
3.5 KiB