Default Branch

master 4867d84b1e · host: change UHD pointer types based on UHD version · Updated 2023-11-26 20:50:28 +00:00

ZIP  TAR.GZ

Branches

fpga_wip 27d0433be7 · fpga: WIP refactoring · Updated 2017-08-04 13:01:59 +00:00    paulmataruso	33 1		ZIP  TAR.GZ
idle_reset 6330a16b16 · reset duc/ddc chain on idle · Updated 2016-04-06 08:21:17 +00:00    paulmataruso	78 1		ZIP  TAR.GZ
sergforce/zpu_fix e99f0b1818 · add fixed image but few rules are violated · Updated 2015-12-25 23:22:32 +00:00    paulmataruso	88 2		ZIP  TAR.GZ
achemeris/debug-spi-issue a870e8a16f · host: Check if DC offset value reads as it's been written to LMS. · Updated 2015-12-24 02:34:40 +00:00    paulmataruso	102 1		ZIP  TAR.GZ
fifo_ctrl_work 7b1348ee97 · fpga: bump compat minor, work on late flag · Updated 2015-07-23 03:05:19 +00:00    paulmataruso	122 3		ZIP  TAR.GZ
fairwaves/4xDDC a8402d9c58 · Add --dump & --erase options for EEPROM · Updated 2014-10-27 15:47:38 +00:00    paulmataruso	395 8		ZIP  TAR.GZ
LTE_30_72MHz_update 4bf5fbc519 · umtrx: checkin images for LTE_30_72MHz · Updated 2014-09-10 06:15:27 +00:00    paulmataruso	298 4		ZIP  TAR.GZ
fairwaves/LTE_30_72MHz 0074db808c · Host: Change the reference clock to 30.72MHz. · Updated 2013-06-20 08:33:42 +00:00    paulmataruso	402 3		ZIP  TAR.GZ