fpga: bump compat minor, work on late flag

fpga: implement fifo control tracking info
* detect loss host to device, and device to host * warn on near fifo capacity * added time wait flag (replaces tsf for waiting) * added skip late flag (implementation TODO)
2025-11-01 12:33:40 +00:00 · 2015-07-22 20:05:19 -07:00 · 2015-07-22 18:14:04 -07:00 · 2015-07-22 13:01:10 -07:00 · 2015-07-21 21:09:25 -04:00 · 2015-07-21 21:09:25 -04:00
51 changed files with 3235 additions and 809 deletions
--- a/debian/changelog
+++ b/debian/changelog
@@ -0,0 +1,17 @@
+umtrx (1.0.4) unstable; urgency=low
+
+  * Do not add 'g' to a git id when creating a version string.
+  * Proper debianization.
+  * Add ability to set diversity switches position from UHD args.
+  * By default route each Rx channel to it's own antenna.
+  * JSON API to question/control property tree of a running UHD app. Useful for querying sensors and for debugging purposes.
+  * Python utility to query VSWR from a running UHD app in real time using JSON API.
+  * Fix DC and IQ calibration utilities.
+
+ -- Alexander Chemeris <Alexander.Chemeris@fairwaves.co>  Tue, 21 Jul 2015 18:51:56 -0400
+
+umtrx (1.0.3) unstable; urgency=low
+
+  * Created debian control files for 1.0.3 release of umtrx
+
+ -- Josh Blum <josh@pothosware.com>  Sat, 20 Jun 2015 16:31:24 -0700
--- a/debian/compat
+++ b/debian/compat
@@ -0,0 +1 @@
+9
--- a/debian/control
+++ b/debian/control
@@ -0,0 +1,29 @@
+Source: umtrx
+Section: libs
+Priority: optional
+Maintainer: Josh Blum <josh@pothosware.com>
+Build-Depends:
+    debhelper (>= 9.0.0),
+    cmake (>= 2.8),
+    libboost-all-dev,
+    libuhd-dev (>= 3.7)
+Standards-Version: 3.9.5
+Homepage: http://umtrx.org/
+Vcs-Git: https://github.com/fairwaves/UHD-Fairwaves.git
+Vcs-Browser: https://github.com/fairwaves/UHD-Fairwaves
+
+Package: umtrx
+Section: libs
+Architecture: any
+Pre-Depends: multiarch-support, ${misc:Pre-Depends}
+Depends: ${shlibs:Depends}, ${misc:Depends}, uhd-umtrx
+Recommends: python
+Description: Fairwaves UmTRX driver - runtime utilities
+ The industrial grade dual-channel wide-band SDR transceiver.
+
+Package: uhd-umtrx
+Section: libs
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}
+Description: Fairwaves UmTRX driver - UHD plugin module
+ The industrial grade dual-channel wide-band SDR transceiver.
--- a/debian/copyright
+++ b/debian/copyright
@@ -0,0 +1,12 @@
+Format: http://www.debian.org/doc/packaging-manuals/copyright-format/1.0/
+Upstream-Name: umtrx
+Source: https://github.com/fairwaves/UHD-Fairwaves
+
+Files: *
+Copyright:
+    Copyright 2012-2015 Fairwaves LLC
+    Copyright 2010-2012 Ettus Research LLC
+License: GPL-3
+ On Debian systems, the full text of the GNU General Public
+ License version 3 can be found in the file
+ `/usr/share/common-licenses/GPL-3'.
--- a/debian/docs
+++ b/debian/docs
@@ -0,0 +1 @@
+README
--- a/debian/rules
+++ b/debian/rules
@@ -0,0 +1,18 @@
+#!/usr/bin/make -f
+# -*- makefile -*-
+
+DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH)
+export DEB_HOST_MULTIARCH
+
+# Uncomment this to turn on verbose mode.
+#export DH_VERBOSE=1
+
+# This has to be exported to make some magic below work.
+export DH_OPTIONS
+
+
+%:
+	dh $@ --buildsystem=cmake --parallel --sourcedirectory=host
+
+override_dh_auto_configure:
+	dh_auto_configure -- -DLIB_SUFFIX="/$(DEB_HOST_MULTIARCH)"
--- a/debian/source/format
+++ b/debian/source/format
@@ -0,0 +1 @@
+3.0 (native)
--- a/debian/uhd-umtrx.install
+++ b/debian/uhd-umtrx.install
@@ -0,0 +1 @@
+usr/lib/*/uhd/modules/
--- a/debian/umtrx.install
+++ b/debian/umtrx.install
@@ -0,0 +1 @@
+usr/bin
--- a/fpga/control_lib/settings_fifo_ctrl.v
+++ b/fpga/control_lib/settings_fifo_ctrl.v
@@ -22,7 +22,8 @@ module settings_fifo_ctrl
        parameter XPORT_HDR = 1, //extra transport hdr line
        parameter PROT_DEST = 0, //protocol framer destination
        parameter PROT_HDR = 1, //needs a protocol header?
-        parameter ACK_SID = 0 //stream ID for packet ACK
+        parameter ACK_SID = 0, //stream ID for packet ACK
+        parameter DEPTH = 6 //size of fifo in addr bit width
    )
    (
        //clock and synchronous reset for all interfaces
@@ -75,16 +76,17 @@ module settings_fifo_ctrl
    wire [63:0] in_command_ticks, out_command_ticks;
    wire [31:0] in_command_hdr, out_command_hdr;
    wire [31:0] in_command_data, out_command_data;
-    wire in_command_has_time, out_command_has_time;
    wire command_fifo_full, command_fifo_empty;
    wire command_fifo_read, command_fifo_write;
+    wire [15:0] command_fifo_occupied;

-    shortfifo #(.WIDTH(129)) command_fifo (
+    longfifo #(.WIDTH(128), .SIZE(DEPTH)) command_fifo (
        .clk(clock), .rst(reset), .clear(clear),
-        .datain({in_command_ticks, in_command_hdr, in_command_data, in_command_has_time}),
-        .dataout({out_command_ticks, out_command_hdr, out_command_data, out_command_has_time}),
+        .datain({in_command_ticks, in_command_hdr, in_command_data}),
+        .dataout({out_command_ticks, out_command_hdr, out_command_data}),
        .write(command_fifo_write), .full(command_fifo_full), //input interface
-        .empty(command_fifo_empty), .read(command_fifo_read)  //output interface
+        .empty(command_fifo_empty), .read(command_fifo_read), //output interface
+        .occupied(command_fifo_occupied)
    );

    //------------------------------------------------------------------
@@ -95,13 +97,15 @@ module settings_fifo_ctrl
    wire [31:0] in_result_data, out_result_data;
    wire result_fifo_full, result_fifo_empty;
    wire result_fifo_read, result_fifo_write;
+    wire [15:0] result_fifo_occupied;

-    shortfifo #(.WIDTH(64)) result_fifo (
+    longfifo #(.WIDTH(64), .SIZE(DEPTH)) result_fifo (
        .clk(clock), .rst(reset), .clear(clear),
        .datain({in_result_hdr, in_result_data}),
        .dataout({out_result_hdr, out_result_data}),
        .write(result_fifo_write), .full(result_fifo_full), //input interface
-        .empty(result_fifo_empty), .read(result_fifo_read)  //output interface
+        .empty(result_fifo_empty), .read(result_fifo_read), //output interface
+        .occupied(result_fifo_occupied)
    );

    //------------------------------------------------------------------
@@ -139,7 +143,6 @@ module settings_fifo_ctrl
    assign in_command_ticks    = in_ticks_reg;
    assign in_command_data     = in_data_reg;
    assign in_command_hdr      = in_hdr_reg;
-    assign in_command_has_time = has_tsf_reg;

    always @(posedge clock) begin
        if (reset) begin
@@ -244,18 +247,24 @@ module settings_fifo_ctrl
    always @(posedge clock)
        vita_time_reg <= vita_time;

-    wire late;
+    wire late, now;
    `ifndef FIFO_CTRL_NO_TIME
    time_compare time_compare(
-        .time_now(vita_time_reg), .trigger_time(command_ticks_reg), .late(late));
+        .time_now(vita_time_reg), .trigger_time(command_ticks_reg), .late(late), .now(now));
    `else
    assign late = 1;
+    assign now = 1;
    `endif

+    //these config flags are available only in the LOAD_CMD state (where we wait)
+    wire time_wait = out_command_hdr[9];
+    wire skip_late = out_command_hdr[10]; //TODO (implement)
+    reg cmd_was_late;
+
    //action occurs in the event state and when there is fifo space (should always be true)
    //the third condition is that all peripherals in the perfs signal are ready/active high
    //the fourth condition is that is an event time has been set, action is delayed until that time
-    wire time_ready = (out_command_has_time)? late : 1;
+    wire time_ready = (time_wait)? (late || now) : 1;
    wire action = (cmd_state == EVENT_CMD) && ~result_fifo_full && perfs_ready && time_ready;

    assign command_fifo_read = action;
@@ -275,6 +284,7 @@ module settings_fifo_ctrl
                command_ticks_reg <= out_command_ticks;
                command_hdr_reg <= out_command_hdr;
                command_data_reg <= out_command_data;
+                cmd_was_late <= late; //TODO do something with
            end

            EVENT_CMD: begin // poking and peeking happens here!
@@ -332,11 +342,14 @@ module settings_fifo_ctrl
    localparam WRITE_VRT_SID  = 2;
    localparam WRITE_RB_HDR   = 3;
    localparam WRITE_RB_DATA  = 4;
+    localparam WRITE_RB_DATA2 = 5;
+    localparam WRITE_RB_DATA3 = 6;

    //the state for the start of packet condition
    localparam WRITE_PKT_HDR = (PROT_HDR)? WRITE_PROT_HDR : WRITE_VRT_HDR;

    reg [2:0] out_state;
+    reg [31:0] last_result_hdr;

    assign out_valid = ~result_fifo_empty;
    assign result_fifo_read = out_data[33] && writing;
@@ -344,9 +357,11 @@ module settings_fifo_ctrl
    always @(posedge clock) begin
        if (reset) begin
            out_state <= WRITE_PKT_HDR;
+            last_result_hdr <= 32'b0;
        end
        else if (writing && out_data[33]) begin
            out_state <= WRITE_PKT_HDR;
+            last_result_hdr <= out_result_hdr;
        end
        else if (writing) begin
            out_state <= out_state + 1;
@@ -357,7 +372,7 @@ module settings_fifo_ctrl
    //-- assign to output fifo interface
    //------------------------------------------------------------------
    wire [31:0] prot_hdr;
-    assign prot_hdr[15:0] = 16; //bytes in proceeding vita packet
+    assign prot_hdr[15:0] = 24; //bytes in proceeding vita packet
    assign prot_hdr[16] = 1; //yes frame
    assign prot_hdr[18:17] = PROT_DEST;
    assign prot_hdr[31:19] = 0; //nothing
@@ -370,12 +385,14 @@ module settings_fifo_ctrl
            WRITE_VRT_SID:  out_data_int <= ACK_SID;
            WRITE_RB_HDR:   out_data_int <= out_result_hdr;
            WRITE_RB_DATA:  out_data_int <= out_result_data;
+            WRITE_RB_DATA2: out_data_int <= last_result_hdr;
+            WRITE_RB_DATA3: out_data_int <= {result_fifo_occupied, command_fifo_occupied};
            default:        out_data_int <= 0;
        endcase //state
    end

    assign out_data[35:34] = 2'b0;
-    assign out_data[33] = (out_state == WRITE_RB_DATA);
+    assign out_data[33] = (out_state == WRITE_RB_DATA3);
    assign out_data[32] = (out_state == WRITE_PKT_HDR);
    assign out_data[31:0] = out_data_int;

@@ -389,7 +406,7 @@ module settings_fifo_ctrl
        command_fifo_empty, command_fifo_full, //2
        command_fifo_read, command_fifo_write, //2
        addr, //8
-        strobe_reg, strobe, poke, out_command_has_time //4
+        strobe_reg, strobe, poke, time_wait //4
    };

 endmodule //settings_fifo_ctrl
--- a/fpga/top/UmTRX/bootloader_umtrx.rmi
+++ b/fpga/top/UmTRX/bootloader_umtrx.rmi
@@ -1,5 +1,5 @@
-defparam bootram.RAM0.INIT_00=256'h00000000_00000000_00000000_dfb70400_3a0b0b80_80eea40c_82700b0b_0b0b0b0b;
-defparam bootram.RAM0.INIT_01=256'h00000000_00000000_00000000_800c0400_880c840c_80e0812d_88080b0b_80088408;
+defparam bootram.RAM0.INIT_00=256'h00000000_00000000_00000000_dfcb0400_3a0b0b80_80eeb40c_82700b0b_0b0b0b0b;
+defparam bootram.RAM0.INIT_01=256'h00000000_00000000_00000000_800c0400_880c840c_80e0952d_88080b0b_80088408;
 defparam bootram.RAM0.INIT_02=256'h00000000_00000000_04000000_ffff0652_832b2a83_81058205_72830609_71fd0608;
 defparam bootram.RAM0.INIT_03=256'h83a70400_0b0b0b0b_7383ffff_2b2b0906_05820583_83060981_83ffff73_71fd0608;
 defparam bootram.RAM0.INIT_04=256'h00000000_00000000_53510400_070a8106_73097306_09060906_72057373_72098105;
@@ -18,431 +18,431 @@ defparam bootram.RAM0.INIT_10=256'h00000000_00000000_00000000_00000000_00000000_
 defparam bootram.RAM0.INIT_11=256'h00000000_00000000_00000000_00000000_00000000_04000000_05055351_72720981;
 defparam bootram.RAM0.INIT_12=256'h00000000_00000000_00000000_00000000_00000000_07535104_73730906_72097206;
 defparam bootram.RAM0.INIT_13=256'h00000000_00000000_04000000_81ff0652_1010102a_81058305_72830609_71fc0608;
-defparam bootram.RAM0.INIT_14=256'h00000000_00000000_88aa0400_060b0b0b_10100508_90738306_0b0b80ee_71fc0608;
-defparam bootram.RAM0.INIT_15=256'h00000000_0c510400_0c840c80_80085688_d82d5050_0b0b80d6_88087575_80088408;
-defparam bootram.RAM0.INIT_16=256'h00000000_0c510400_0c840c80_80085688_8a2d5050_0b0b80d8_88087575_80088408;
+defparam bootram.RAM0.INIT_14=256'h00000000_00000000_88aa0400_060b0b0b_10100508_a0738306_0b0b80ee_71fc0608;
+defparam bootram.RAM0.INIT_15=256'h00000000_0c510400_0c840c80_80085688_ec2d5050_0b0b80d6_88087575_80088408;
+defparam bootram.RAM0.INIT_16=256'h00000000_0c510400_0c840c80_80085688_9e2d5050_0b0b80d8_88087575_80088408;
 defparam bootram.RAM0.INIT_17=256'h04000000_07515151_05ff0506_73097274_70547106_8106ff05_0509060a_72097081;
 defparam bootram.RAM0.INIT_18=256'h51040000_06075151_7405ff05_06730972_05705471_098106ff_0509060a_72097081;
 defparam bootram.RAM0.INIT_19=256'h00000000_00000000_00000000_00000000_00000000_00000000_00000000_05ff0504;
-defparam bootram.RAM0.INIT_1A=256'h00000000_00000000_00000000_00000000_00000000_51040000_80eea00c_810b0b0b;
+defparam bootram.RAM0.INIT_1A=256'h00000000_00000000_00000000_00000000_00000000_51040000_80eeb00c_810b0b0b;
 defparam bootram.RAM0.INIT_1B=256'h00000000_00000000_00000000_00000000_00000000_00000000_04000000_71810552;
 defparam bootram.RAM0.INIT_1C=256'h00000000_00000000_00000000_00000000_00000000_00000000_00000000_00000000;
 defparam bootram.RAM0.INIT_1D=256'h00000000_00000000_00000000_00000000_00000000_04000000_10100552_02840572;
 defparam bootram.RAM0.INIT_1E=256'h00000000_00000000_00000000_00000000_00000000_00000000_00000000_00000000;
 defparam bootram.RAM0.INIT_1F=256'h00000000_00000000_00000000_00000000_00000000_020d0400_05715351_717105ff;
-defparam bootram.RAM0.INIT_20=256'h10101010_10101010_10101010_10101010_10101010_10101010_d7fe3f04_82813f80;
+defparam bootram.RAM0.INIT_20=256'h10101010_10101010_10101010_10101010_10101010_10101010_d8923f04_82813f80;
 defparam bootram.RAM0.INIT_21=256'hfc060c51_102b0772_83051010_06098105_ff067383_51047381_10101053_10101010;
 defparam bootram.RAM0.INIT_22=256'h51535104_72ed3851_0a100a53_71105272_09720605_8106ff05_72728072_51043c04;
-defparam bootram.RAM0.INIT_23=256'h800b80ef_800c82a0_0b0b80ef_8380800b_822ebd38_80eea408_802ea438_80eea008;
-defparam bootram.RAM0.INIT_24=256'h0b80ef84_80808280_ef800cf8_0b0b0b80_808080a4_880c04f8_800b80ef_840c8290;
-defparam bootram.RAM0.INIT_25=256'h940b80ef_80c0a880_80ef800c_8c0b0b0b_80c0a880_ef880c04_84800b80_0cf88080;
-defparam bootram.RAM0.INIT_26=256'h70085252_80eeac08_5170a738_80ef8c33_04ff3d0d_80ef880c_80e0b00b_840c0b0b;
-defparam bootram.RAM0.INIT_27=256'h8c34833d_810b80ef_5270ee38_08700852_2d80eeac_eeac0c70_38841280_70802e94;
-defparam bootram.RAM0.INIT_28=256'h38823d0d_09810685_800b802e_0b0b0b0b_802e8e38_80eefc08_3d0d0b0b_0d040480;
-defparam bootram.RAM0.INIT_29=256'h0b81e088_80ce3881_0d685a79_0404ee3d_3f823d0d_0b0bf5d4_eefc510b_040b0b80;
+defparam bootram.RAM0.INIT_23=256'h800b80ef_900c82a0_0b0b80ef_8380800b_822ebd38_80eeb408_802ea438_80eeb008;
+defparam bootram.RAM0.INIT_24=256'h0b80ef94_80808280_ef900cf8_0b0b0b80_808080a4_980c04f8_800b80ef_940c8290;
+defparam bootram.RAM0.INIT_25=256'h940b80ef_80c0a880_80ef900c_8c0b0b0b_80c0a880_ef980c04_84800b80_0cf88080;
+defparam bootram.RAM0.INIT_26=256'h70085252_80eebc08_5170a738_80ef9c33_04ff3d0d_80ef980c_80e0c40b_940c0b0b;
+defparam bootram.RAM0.INIT_27=256'h9c34833d_810b80ef_5270ee38_08700852_2d80eebc_eebc0c70_38841280_70802e94;
+defparam bootram.RAM0.INIT_28=256'h38823d0d_09810685_800b802e_0b0b0b0b_802e8e38_80ef8c08_3d0d0b0b_0d040480;
+defparam bootram.RAM0.INIT_29=256'h0b81e088_80ce3881_0d685a79_0404ee3d_3f823d0d_0b0bf5d4_ef8c510b_040b0b80;
 defparam bootram.RAM0.INIT_2A=256'h7981e180_81e0f80c_0c890a0b_7981e598_81e5940c_e48c0c79_880c7981_0c7981e4;
 defparam bootram.RAM0.INIT_2B=256'h81e2e80c_0c890a0b_7981e2a0_81e2980c_0c890a0b_7981e1d0_81e1c80c_0c890a0b;
-defparam bootram.RAM0.INIT_2C=256'ha9a03f89_0553425a_54973d84_08933d70_8238881a_8b6a2781_0c818839_7981e2f0;
-defparam bootram.RAM0.INIT_2D=256'h7b34811c_5b5b7933_7b1d7f1d_3d415e5c_0b883d99_5b5f4080_0284057b_9e3f8008;
+defparam bootram.RAM0.INIT_2C=256'ha9b43f89_0553425a_54973d84_08933d70_8238881a_8b6a2781_0c818839_7981e2f0;
+defparam bootram.RAM0.INIT_2D=256'h7b34811c_5b5b7933_7b1d7f1d_3d415e5c_0b883d99_5b5f4080_0284057b_a83f8008;
 defparam bootram.RAM0.INIT_2E=256'h7c26ed38_811c5c88_79337b34_7d055b5b_7b1d963d_901f5e5c_ef38800b_5c887c26;
 defparam bootram.RAM0.INIT_2F=256'h611d5b5b_805c7b1e_7c26ef38_811c5c86_79337b34_601d5b5b_5e5c7b1d_800b881f;
-defparam bootram.RAM0.INIT_30=256'h5a588379_84120859_3d0d686a_3d0d04ee_9a963f94_7c26ef38_811c5c86_79337b34;
-defparam bootram.RAM0.INIT_31=256'hf55778a3_958e3f80_80e0b451_75538c52_802e8c38_2e943875_0856758c_279c3877;
-defparam bootram.RAM0.INIT_32=256'h75922682_ff981756_8818085d_8c5ba05c_fb3fa057_e1845194_53a45280_268e3878;
-defparam bootram.RAM0.INIT_33=256'h5c8c1808_983980da_08085e82_88ad3f80_0480d55c_05567508_2980e2f4_ae387584;
-defparam bootram.RAM0.INIT_34=256'h39921822_065f81f5_0883ffff_abc23f80_38828239_75822e91_812e8938_5e7d5675;
-defparam bootram.RAM0.INIT_35=256'h1808538c_18335490_57765596_2e833884_577580f2_18335682_81eb3995_51ab903f;
-defparam bootram.RAM0.INIT_36=256'h81b3398d_5f80d35c_893f8008_57765196_2e833881_57577577_0b971933_18085280;
-defparam bootram.RAM0.INIT_37=256'h19538c19_3370548e_94398d18_3f80c95c_52568bc0_538c1933_953dea05_18337054;
-defparam bootram.RAM0.INIT_38=256'h80c23875_56758526_1833ff05_80ff3994_05b50534_5c750284_8e3f80c8_3352568d;
-defparam bootram.RAM0.INIT_39=256'h0ca23992_90180877_225fa939_5fae3976_08047608_08585675_c0058c19_842980e3;
-defparam bootram.RAM0.INIT_3A=256'h08710c56_90059019_842980ef_568e3976_05700840_2980ef90_9b397684_18227723;
+defparam bootram.RAM0.INIT_30=256'h5a588379_84120859_3d0d686a_3d0d04ee_9aaa3f94_7c26ef38_811c5c86_79337b34;
+defparam bootram.RAM0.INIT_31=256'hf55778a3_95983f80_80e0c851_75538c52_802e8c38_2e943875_0856758c_279c3877;
+defparam bootram.RAM0.INIT_32=256'h75922682_ff981756_8818085d_8c5ba05c_853fa057_e1985195_53a45280_268e3878;
+defparam bootram.RAM0.INIT_33=256'h5c8c1808_983980da_08085e82_88b73f80_0480d55c_05567508_2980e388_ae387584;
+defparam bootram.RAM0.INIT_34=256'h39921822_065f81f5_0883ffff_abd63f80_38828239_75822e91_812e8938_5e7d5675;
+defparam bootram.RAM0.INIT_35=256'h1808538c_18335490_57765596_2e833884_577580f2_18335682_81eb3995_51aba43f;
+defparam bootram.RAM0.INIT_36=256'h81b3398d_5f80d35c_933f8008_57765196_2e833881_57577577_0b971933_18085280;
+defparam bootram.RAM0.INIT_37=256'h19538c19_3370548e_94398d18_3f80c95c_52568bca_538c1933_953dea05_18337054;
+defparam bootram.RAM0.INIT_38=256'h80c23875_56758526_1833ff05_80ff3994_05b50534_5c750284_983f80c8_3352568d;
+defparam bootram.RAM0.INIT_39=256'h0ca23992_90180877_225fa939_5fae3976_08047608_08585675_d4058c19_842980e3;
+defparam bootram.RAM0.INIT_3A=256'h08710c56_a0059019_842980ef_568e3976_05700840_2980efa0_9b397684_18227723;
 defparam bootram.RAM0.INIT_3B=256'h3d790557_58771996_0b833d5a_dc055480_0855943d_cc5c8c18_39785e80_80d25cad;
 defparam bootram.RAM0.INIT_3C=256'h5a587719_800b833d_3ddc0554_5ca45594_38a439a0_887826ed_34811858_57753377;
-defparam bootram.RAM0.INIT_3D=256'h04fd3d0d_3f943d0d_80519b85_ed388380_58887826_77348118_57577533_963d7905;
-defparam bootram.RAM0.INIT_3E=256'h52725186_80c05372_e82e8438_a0537387_802e9838_91fe3f73_e1d05254_75705380;
-defparam bootram.RAM0.INIT_3F=256'h0d82863f_0d04fa3d_a63f853d_52735186_ae3f80c0_52735186_3f9039a0_ba3f9b92;
-defparam bootram.RAM1.INIT_00=256'hefac0cab_3f800b80_ac5191b0_8c5280e2_5191b93f_5280e28c_879f3f89_80e1f051;
-defparam bootram.RAM1.INIT_01=256'h518fdc3f_863f8008_82d63f84_81e09c0c_9c0c800b_810b81e0_3f84e93f_d53f8480;
-defparam bootram.RAM1.INIT_02=256'h5194983f_73528008_5483e83f_ce3f8008_869e3f84_518ff63f_da3f8008_86aa3f84;
-defparam bootram.RAM1.INIT_03=256'h52838084_de3f8ab2_80805194_8c935283_3f94a23f_08518def_80845280_84bd3f83;
-defparam bootram.RAM1.INIT_04=256'haca03fae_3f8fbd51_fa3f8dda_809251a4_94c93f83_83808251_80c79452_5194d43f;
-defparam bootram.RAM1.INIT_05=256'h7382fdee_05225555_7680088e_2e80c938_56800880_ea3f8008_fc05518d_c53f883d;
-defparam bootram.RAM1.INIT_06=256'h518fe93f_3880e2d8_3f80089a_5180cc9c_80089005_80e2d052_ad388453_2e098106;
-defparam bootram.RAM1.INIT_07=256'ha4cf3f8b_3f8cf73f_75519a83_88397452_5183fd3f_85823f73_548eda3f_94167052;
-defparam bootram.RAM1.INIT_08=256'h9b3f9f52_52805184_86f23f9f_3f8ba13f_b13f85f6_84cb3f91_39fe3d0d_e93fff9e;
-defparam bootram.RAM1.INIT_09=256'h83dd3f82_88528851_518ad33f_ea3f82ac_52845183_8ae03f84_3f82ac51_805183f7;
-defparam bootram.RAM1.INIT_0A=256'he4518aaa_83c13f80_9f528051_b93f8253_82ac518a_5183d03f_3f905290_ac518ac6;
-defparam bootram.RAM1.INIT_0B=256'h3f9f5281_9e5183bc_df389f52_53728025_9d3fff13_80e4518a_5183b43f_3f9f529c;
-defparam bootram.RAM1.INIT_0C=256'h80760c80_5189ef3f_585680e4_e0807008_fa3d0d81_843d0d04_810b800c_5183983f;
-defparam bootram.RAM1.INIT_0D=256'h518e893f_5280e3d8_a93f8008_52815190_88805381_86559054_3f750856_e45189e6;
-defparam bootram.RAM1.INIT_0E=256'h0b800c88_a6d73f81_518df13f_5280e3f4_913f8008_52815190_88805382_86559054;
-defparam bootram.RAM1.INIT_0F=256'h802e8338_33525270_38721770_7276279e_56548053_57578170_3d0d787a_3d0d04fa;
-defparam bootram.RAM1.INIT_10=256'h5170800c_2e833881_07517080_df397474_55811353_2e833880_527181ff_80547133;
-defparam bootram.RAM1.INIT_11=256'h3d0d04f9_c78e3f84_eeb45180_e4945280_34865380_0b80efb4_fe3d0d81_883d0d04;
-defparam bootram.RAM1.INIT_12=256'hb5c63f80_5280d051_70545682_8654873d_80efb434_bd38810b_b4335574_3d0d80ef;
-defparam bootram.RAM1.INIT_13=256'h755280ee_8d388653_ff065574_3f800881_7551fef3_9d388652_5574802e_0881ff06;
-defparam bootram.RAM1.INIT_14=256'hb00c04fb_900880ee_b03480e4_810b80ef_893d0d04_b40b800c_c33f80ee_b45180c6;
-defparam bootram.RAM1.INIT_15=256'hb4e63f80_5280d051_fc05538c_8454873d_80efb034_b938810b_b0335574_3d0d80ef;
-defparam bootram.RAM1.INIT_16=256'h387580ee_06557486_800881ff_51fe903f_873dfc05_99388452_5574802e_0881ff06;
-defparam bootram.RAM1.INIT_17=256'h3f800881_d051b3ac_538c5280_56845475_fb3d0d77_873d0d04_b00b800c_b00c80ee;
-defparam bootram.RAM1.INIT_18=256'h3d0d7309_3d0d0480_74800c87_80efb034_b00c810b_750880ee_802e8d38_ff065574;
-defparam bootram.RAM1.INIT_19=256'h09737506_803d0d73_823d0d04_e08c0c51_efb80c81_06077080_80efb808_73750671;
-defparam bootram.RAM1.INIT_1A=256'h74705353_04fe3d0d_0481af3f_51823d0d_81e0980c_80efbc0c_08060770_7180efbc;
-defparam bootram.RAM1.INIT_1B=256'h0d777956_0d04fb3d_b63f833d_52805181_ff3d0d8a_843d0d04_3f72800c_805181c7;
-defparam bootram.RAM1.INIT_1C=256'h39800b80_81913fe5_53765255_7481ff06_90388115_5472802e_81ff0654_56743370;
-defparam bootram.RAM1.INIT_1D=256'hbd3f8a52_705253ff_0d747653_0d04fe3d_cd3f833d_73528051_04ff3d0d_0c873d0d;
-defparam bootram.RAM1.INIT_1E=256'h0d725102_0d04803d_dd3f833d_73528051_04ff3d0d_0c843d0d_3f800b80_725180e7;
-defparam bootram.RAM1.INIT_1F=256'h7022720c_80e49c05_80057510_a0298290_ff3d0d73_823d0d04_eebc1234_8f053380;
-defparam bootram.RAM1.INIT_20=256'h51ce3f81_13335272_3f80eec0_527251c6_eebc1333_0d805380_0d04fe3d_5351833d;
-defparam bootram.RAM1.INIT_21=256'hbc143353_953880ee_2e098106_5654748a_3d0d7678_3d0d04fc_25e53884_13538273;
-defparam bootram.RAM1.INIT_22=256'h2ef83874_08537280_05548414_29829080_de3f73a0_8d527351_81068738_72812e09;
-defparam bootram.RAM1.INIT_23=256'h38901208_70802e85_5252ff53_05881108_29829080_3d0d74a0_3d0d04fe_8c150c86;
-defparam bootram.RAM1.INIT_24=256'h0c70882a_0681a880_227081ff_0c80eec8_0b81a888_ff3d0d80_843d0d04_5372800c;
-defparam bootram.RAM1.INIT_25=256'h55568152_9f053357_7a028805_fb3d0d78_833d0d04_81a8880c_5181800b_81a8840c;
-defparam bootram.RAM1.INIT_26=256'hff135372_802e9338_51515271_2a708106_90087086_d05381a8_c7388386_73802e81;
-defparam bootram.RAM1.INIT_27=256'h0c8386d0_0b81a890_8c0c8190_810781a8_9f397410_3f725281_a851fde5_e93880e4;
-defparam bootram.RAM1.INIT_28=256'h51fdae3f_3880e4c4_135372e9_2e8e38ff_51527180_70810651_0870812a_5381a890;
-defparam bootram.RAM1.INIT_29=256'h3880e852_802e80c5_80cf3873_5271802e_32515151_81067081_70872a70_81a89008;
-defparam bootram.RAM1.INIT_2A=256'h5271802e_81065151_70812a70_81a89008_8386d053_81a8900c_38a05271_73812e83;
-defparam bootram.RAM1.INIT_2B=256'h1454ffb7_055834ff_71767081_a88c0852_fcdf3f81_80e4c451_5372e938_8e38ff13;
-defparam bootram.RAM1.INIT_2C=256'h05335755_0288059f_3d0d787a_3d0d04fb_71800c87_81a8900c_3980c00b_39815288;
-defparam bootram.RAM1.INIT_2D=256'h3880e4e4_135372e9_2e9338ff_51527180_70810651_0870862a_5381a890_568386d0;
-defparam bootram.RAM1.INIT_2E=256'ha8900c83_90527181_2e843881_d0527380_a88c0c81_39741081_725281bb_51fc8a3f;
-defparam bootram.RAM1.INIT_2F=256'he4c451fb_72e93880_38ff1353_71802e8e_06515152_812a7081_a8900870_86d05381;
-defparam bootram.RAM1.INIT_30=256'h80d83875_3873802e_802e80e2_51515271_70813251_2a708106_90087087_cc3f81a8;
-defparam bootram.RAM1.INIT_31=256'h70812a70_81a89008_8386d053_81a8900c_38905271_73812e83_0c80d052_3381a88c;
-defparam bootram.RAM1.INIT_32=256'h872a7081_a8900870_faf73f81_80e4c451_5372e938_8e38ff13_5271802e_81065151;
-defparam bootram.RAM1.INIT_33=256'h0b81a890_8a3980c0_a4398152_155556ff_388116ff_71802e8e_51515152_06708132;
-defparam bootram.RAM1.INIT_34=256'hb8ac0870_ac085281_9b3881b8_53727425_0d755480_0d04fd3d_800c873d_0c805271;
-defparam bootram.RAM1.INIT_35=256'h0c81e00b_0b828088_ff3d0dff_853d0d04_1353e239_27f13881_81cb8f71_73315151;
-defparam bootram.RAM1.INIT_36=256'h540cff11_72708405_87519eda_80f9fc52_82808c0c_840cff0b_ef0b8280_8280800c;
-defparam bootram.RAM1.INIT_37=256'h8053810b_06585152_808c0871_08700982_0d828088_0d04fb3d_f138833d_51708025;
-defparam bootram.RAM1.INIT_38=256'h81138415_8c0c8f39_2d748280_73085271_8f387251_5271802e_55747606_80f9fc55;
-defparam bootram.RAM1.INIT_39=256'hf9fc0575_71842980_87269f38_0d735271_0d04ff3d_dc38873d_53877325_76105755;
-defparam bootram.RAM1.INIT_3A=256'h3d0d0292_0d0404ff_5152833d_80880c53_70720682_82808808_722b7009_710c5181;
-defparam bootram.RAM1.INIT_3B=256'hb8a00870_e0c00c81_0d810b81_0d04803d_c80c833d_0c5281e0_0881e0c4_05227470;
-defparam bootram.RAM1.INIT_3C=256'h06545272_a0087081_3d0d81b8_3d0d04fe_e0c00c82_38820b81_70802ef3_84065151;
-defparam bootram.RAM1.INIT_3D=256'h51527180_2a708106_9a397181_81808052_710c5353_7571902a_81b8a008_802e9338;
-defparam bootram.RAM1.INIT_3E=256'h087080c0_0d81b8a0_0d04803d_800c843d_3f725271_dc3fffa6_e58051f7_2e8b3880;
-defparam bootram.RAM1.INIT_3F=256'h880781e0_2270902b_0d028e05_0d04ff3d_800c823d_8180800b_802ef238_06515170;
-defparam bootram.RAM2.INIT_00=256'h3d0d7554_3d0d04fd_e0c00c83_38840b81_70802ef3_90065151_b8a00870_c00c5281;
-defparam bootram.RAM2.INIT_01=256'h38853d0d_857327e6_3f811353_5252acc3_72147033_51f6ae3f_2e8638ba_80537280;
-defparam bootram.RAM2.INIT_02=256'h873d0d04_5180ed3f_5680e584_54703353_55811133_56821133_77831133_04fb3d0d;
-defparam bootram.RAM2.INIT_03=256'h8f387580_57768025_5f5d5b59_9f2a515b_33703070_9005bb05_7e616302_f63d0d7c;
-defparam bootram.RAM2.INIT_04=256'hf13f8008_527651b4_54805377_38795578_77772694_2d763057_52ad5178_2e8a3879;
-defparam bootram.RAM2.INIT_05=256'h028b0533_04803d0d_2d8c3d0d_05335178_0880e590_b5893f80_77527651_51ffbd3f;
-defparam bootram.RAM2.INIT_06=256'hff065757_78337081_b95c5a58_055208a1_3d707084_f73d0d8c_823d0d04_51f5963f;
-defparam bootram.RAM2.INIT_07=256'hf02e80fb_57597580_81197033_0680db38_a52e0981_ff065675_d1387681_75802e81;
-defparam bootram.RAM2.INIT_08=256'h7580e42e_38819539_802e819e_248a3875_387580e3_80e32eb9_24a03875_387580f0;
-defparam bootram.RAM2.INIT_09=256'h7580f82e_3880f539_f32e80db_8b387580_7580f524_f52eac38_8b397580_80c63881;
-defparam bootram.RAM2.INIT_0A=256'h52595680_84197108_80da3977_7551792d_59568052_83123352_39778419_ba3880ec;
-defparam bootram.RAM2.INIT_0B=256'h84197108_52923977_5481538a_8055a1b9_08525956_77841971_80539039_55a1b954;
-defparam bootram.RAM2.INIT_0C=256'h33567580_59595676_84197108_3f9e3977_7551fdd0_80539052_55a1b954_52595680;
-defparam bootram.RAM2.INIT_0D=256'h0d048a0b_800c8b3d_a339800b_811959fe_792dec39_05583351_52767081_2e8e3880;
-defparam bootram.RAM2.INIT_0E=256'h0d04fc3d_ef38823d_51515170_32708106_708c2a81_81b8b408_04803d0d_81e5e40c;
-defparam bootram.RAM2.INIT_0F=256'h810a0752_2e863871_54557080_06555556_7b077281_3372982b_88059b05_0d797b02;
-defparam bootram.RAM2.INIT_10=256'h3f7181e5_5151ffa9_3179712b_0752a075_3871820a_70802e86_81065151_72822a70;
-defparam bootram.RAM2.INIT_11=256'h04fc3d0d_0c863d0d_08517080_3f81b880_8938ff95_5173802e_e5ec0c73_e80c7081;
-defparam bootram.RAM2.INIT_12=256'h902a5170_51ee3971_81155553_70227305_38721015_7274278f_55558053_76787a54;
-defparam bootram.RAM2.INIT_13=256'h755280ef_3d0d8653_3d0d04fd_71800c86_0552ec39_0672902a_7183ffff_802e8d38;
-defparam bootram.RAM2.INIT_14=256'h0c8812ff_89518072_80efd452_04ff3d0d_54853d0d_80efcc0c_3f767008_c451b6c4;
-defparam bootram.RAM2.INIT_15=256'h22547274_d0525270_800b80ef_96052253_fd3d0d02_833d0d04_8025f338_12525270;
-defparam bootram.RAM2.INIT_16=256'h7183ffff_3d0d787a_3d0d04fa_70800c85_ee388051_52897225_12881252_2e8e3881;
-defparam bootram.RAM2.INIT_17=256'hd0555555_d40b80ef_800880ef_050cad39_76800884_802e8938_c73f8008_06535856;
-defparam bootram.RAM2.INIT_18=256'h7684140c_3f757323_eb38a381_55897525_15881454_2e8f3881_55527180_73088815;
-defparam bootram.RAM2.INIT_19=256'h52913ddc_923d8805_933f7353_055254b5_53923dd6_7054933d_f13d0d86_883d0d04;
-defparam bootram.RAM2.INIT_1A=256'h0b8c3d23_a6052380_80028405_0b8b3d23_23818a80_8405a205_3f908002_0551b584;
-defparam bootram.RAM2.INIT_1B=256'h538a5291_5d665e80_ae052368_80028405_0b8d3d23_2380c091_8405aa05_81808002;
-defparam bootram.RAM2.INIT_1C=256'h0523800b_028405ba_23963d22_3d22903d_ae052398_08028405_fdb73f80_3de40551;
-defparam bootram.RAM2.INIT_1D=256'h3f913d0d_0551a4f4_29829884_526980c0_913dd405_0523ac53_028405be_913d2380;
-defparam bootram.RAM2.INIT_1E=256'hc4529a3d_865380ef_51b3f13f_9a3df205_539b3d52_973d2386_805b800b_04e83d0d;
-defparam bootram.RAM2.INIT_1F=256'h0b9b3dc4_08585a80_3f800880_0523f7e2_840580e2_f2052202_e33f0280_f80551b3;
-defparam bootram.RAM2.INIT_20=256'h088305fc_085fa33d_6e5ea13d_845c905d_3d084659_3d0845a3_436e44a1_1143f005;
-defparam bootram.RAM2.INIT_21=256'h760c7508_27843873_5a557375_71315156_7c319080_08701a78_56845875_06408c3d;
-defparam bootram.RAM2.INIT_22=256'heeef3f75_80e5ac51_802e8838_83065473_38941608_0654738c_9a387383_5473802e;
-defparam bootram.RAM2.INIT_23=256'h78bf2684_25ffac38_59577780_0817ff19_70840557_a3c63f75_08527651_08539416;
-defparam bootram.RAM2.INIT_24=256'h237f1f94_800b943d_4040818a_3d0d6b6e_3d0d04ea_f6e83f9a_78822a51_3880c059;
-defparam bootram.RAM2.INIT_25=256'h80075a79_236980c0_0580ce05_80800284_953d2381_0523800b_840580ca_055a7902;
-defparam bootram.RAM2.INIT_26=256'he03f8008_70525cfa_8a52933d_68478053_efcc0846_d2052380_02840580_963d2380;
-defparam bootram.RAM2.INIT_27=256'h5a799238_0881ff06_8ac83f80_70535c5e_7053983d_0523913d_840580d2_095a7902;
-defparam bootram.RAM2.INIT_28=256'h557b5490_6b575d94_6d596058_39027f5a_ecde3fa9_51f6b63f_f7c23f7a_80e5d851;
-defparam bootram.RAM2.INIT_29=256'h04f73d0d_3f983d0d_ef38fd89_5c867c26_7b34811c_5b5b7933_7b1d7c1f_8053805c;
-defparam bootram.RAM2.INIT_2A=256'h05a60523_23800284_57768b3d_05238818_028405a2_238d3d22_05228a3d_7f5802ae;
-defparam bootram.RAM2.INIT_2B=256'h3d239080_0d810b8e_0d04ee3d_9e3f8b3d_527d51fe_f8055391_88548b3d_77567e55;
-defparam bootram.RAM2.INIT_2C=256'h86538008_23e9a43f_8405b605_05348102_028405b5_8f3d3484_0523860b_028405b2;
-defparam bootram.RAM2.INIT_2D=256'h52943df6_3f865380_0551b090_52943df2_84538008_3fe9f43f_0551b0a0_52943dec;
-defparam bootram.RAM2.INIT_2E=256'h54908653_943de405_80569c55_80588057_025c8059_80080843_3fe9d83f_0551b19d;
-defparam bootram.RAM2.INIT_2F=256'h3d0daa3d_3d0d04d9_fbcb3f94_7b26ef38_811b5b86_1b337a34_5a80e5a4_805b7a1c;
-defparam bootram.RAM2.INIT_30=256'h9b268d38_055b5b79_088429f2_901dac3d_06829d38_862e0981_5f5d7d90_088e1122;
-defparam bootram.RAM2.INIT_31=256'h7990802e_821b225a_0686e238_812e0981_7a225a79_3f86ee39_8851f5a0_795280e6;
-defparam bootram.RAM2.INIT_32=256'h810686b9_79812e09_861b225a_0686c638_842e0981_225a798c_d438841b_09810686;
-defparam bootram.RAM2.INIT_33=256'hffa80551_cc52a93d_845380ef_3f800843_525f87fd_3fa81d70_52408885_389e1d70;
-defparam bootram.RAM2.INIT_34=256'h3d23821b_3f7a22a1_7951aeb0_80efc452_3d5a8653_868f38a7_085c8008_add23f80;
-defparam bootram.RAM2.INIT_35=256'h81820523_82028405_81810534_33028405_3d34851b_841b33a2_80fe0523_22028405;
-defparam bootram.RAM2.INIT_36=256'h8e055b86_ef3f0281_05525aad_53aa3dea_8470547f_51adfd3f_a93de405_86537952;
-defparam bootram.RAM2.INIT_37=256'h7e51adc8_86537a52_3f9e3d5f_0551add4_52a93df4_3f79537f_7a51ade0_53981d52;
-defparam bootram.RAM2.INIT_38=256'h7b34811c_5b5b7933_7b1d7f1d_05547d53_55a93ddc_7c575d9c_7c597c58_3f027c5a;
-defparam bootram.RAM2.INIT_39=256'h2a435b5b_7022708c_e438901d_09810684_7d90802e_3f84ee39_ef38f999_5c867c26;
-defparam bootram.RAM2.INIT_3A=256'h2280ffff_c038861b_09810684_5a79852e_708f0651_3879882a_810684d1_60842e09;
-defparam bootram.RAM2.INIT_3B=256'h1c625580_815e7e90_80088338_51abe13f_a452821d_865380e5_b4387e5e_065f7e84;
-defparam bootram.RAM2.INIT_3C=256'h9c1d5184_38881d52_802e8481_7d87387b_8338815c_cb3f8008_535b5cab_efcc5470;
-defparam bootram.RAM2.INIT_3D=256'h8c1b087a_0683de38_912e0981_81bb387f_407f812e_ec11405d_33821c22_b83f891b;
-defparam bootram.RAM2.INIT_3E=256'h39ac1de4_ef3f83bd_e6a851f1_537d5280_2e8f3879_42407d7a_11225d5d_08a41f84;
-defparam bootram.RAM2.INIT_3F=256'h3d993d5f_237f499a_7a22993d_2e83a638_42800880_c33f8008_535d5df5_1d821d22;
-defparam bootram.RAM3.INIT_00=256'h60478853_22973d23_b33f821b_527f51ab_40885379_bf3f9c3d_527951ab_5a88537d;
-defparam bootram.RAM3.INIT_01=256'h5c7b1d7c_7e843d5e_7b567c55_51ab953f_5379527d_ab9e3f88_05527951_a93dffb4;
-defparam bootram.RAM3.INIT_02=256'h1b5b887b_051c3481_79330284_5b7f1b5a_26ef3880_1c5c887c_337b3481_1f5b5b79;
-defparam bootram.RAM3.INIT_03=256'h7d882e81_832e8a38_405b427d_a41e7033_398c1b08_792d82ad_8405085a_26ef3861;
-defparam bootram.RAM3.INIT_04=256'h5c79912e_12335c5e_80c01e89_a238ac1d_09810681_5a79832e_39811a33_bb388295;
-defparam bootram.RAM3.INIT_05=256'h9b3d2379_085a7c22_fe388c1c_08802e80_80084180_51f4813f_f4387c22_09810681;
-defparam bootram.RAM3.INIT_06=256'h901c085a_51a9ed3f_537d527f_963d4088_51a9f93f_537a527d_3d5c5e88_4b983d9b;
-defparam bootram.RAM3.INIT_07=256'h3f7e567e_7d51a9cc_88537a52_51a9d53f_cc05527a_8853a93d_3d23794d_821d229d;
-defparam bootram.RAM3.INIT_08=256'h5a793302_805b7f1b_7c26ef38_811c5c88_79337b34_7c1f5b5b_5e5c7b1d_557e843d;
-defparam bootram.RAM3.INIT_09=256'hac1de41d_3f80de39_e951e4a1_5a792d80_60840508_7b26ef38_811b5b88_84051c34;
-defparam bootram.RAM3.INIT_0A=256'h861a2202_22963d23_0523841a_840580ce_05347e02_840580cd_3d347e02_5d5d7e95;
-defparam bootram.RAM3.INIT_0B=256'hc03f8008_527c51f1_537b812a_cc3f8008_70525bf1_6052943d_05237e53_840580d2;
-defparam bootram.RAM3.INIT_0C=256'h04fc3d0d_3fa93d0d_6151f5f7_7a537f52_7c557d54_05237b56_840580ce_095a7902;
-defparam bootram.RAM3.INIT_0D=256'h70752e09_8c135351_56517108_80f0a854_38767008_727427a4_a0085553_800b80f0;
-defparam bootram.RAM3.INIT_0E=256'h77797153_04fb3d0d_0c863d0d_ff517080_7326e738_81135373_72518b39_81068538;
-defparam bootram.RAM3.INIT_0F=256'h3980f0a4_f0a00c8e_38811480_73872689_f0a00854_25ba3880_3f800880_5755ffb9;
-defparam bootram.RAM3.INIT_10=256'h5280f0ac_54865375_a8120c51_760880f0_1470822b_0c547310_0680f0a4_08811187;
-defparam bootram.RAM3.INIT_11=256'h0d04fd3d_8f3f873d_ac0551a7_842980f0_53755273_08055486_80081080_14519439;
-defparam bootram.RAM3.INIT_12=256'hac055276_842980f0_54865373_10800805_99388008_73800824_d83f8054_0d7551fe;
-defparam bootram.RAM3.INIT_13=256'h07821433_2b71902b_12337198_75703381_04fd3d0d_0c853d0d_81547380_51a6e53f;
-defparam bootram.RAM3.INIT_14=256'hf1882256_0d7d7f80_0d04f93d_5452853d_52535456_7107800c_07831633_70882b72;
-defparam bootram.RAM3.INIT_15=256'h14709029_38739029_832680d3_52565473_22707231_ff068b3d_387383ff_595776a8;
-defparam bootram.RAM3.INIT_16=256'h26ad3874_57547483_70723157_068d3d22_7383ffff_2380c039_51547674_80f18c05;
-defparam bootram.RAM3.INIT_17=256'h17703353_27913875_80567578_51a5d53f_80f18c05_52739029_88538a3d_90291554;
-defparam bootram.RAM3.INIT_18=256'h80f18c54_8823800b_052280f1_3d0d029a_3d0d04fc_56ec3989_a63f8116_547451e2;
-defparam bootram.RAM3.INIT_19=256'h3f811482_0551ef9b_f1882274_b5965280_828c140c_140c800b_800b8288_54807323;
-defparam bootram.RAM3.INIT_1A=256'h70810651_7c2c8132_8c5a5c82_800b80f1_04f43d0d_38863d0d_837427d9_90145454;
-defparam bootram.RAM3.INIT_1B=256'h3f8008ff_7b51e1eb_1a88055b_80d63878_7981ff26_1a085b5d_38758288_567581be;
-defparam bootram.RAM3.INIT_1C=256'h59515858_25075351_80257180_32703072_7030728d_06708a32_800881ff_2e80c538;
-defparam bootram.RAM3.INIT_1D=256'h1a0c811a_800b828c_82881a0c_19088105_5d348288_7b708105_38815d77_76802e83;
-defparam bootram.RAM3.INIT_1E=256'h1b0c568b_8111828c_828c1908_387c9138_802e80d2_82881908_27ffb138_5a81ff7a;
-defparam bootram.RAM3.INIT_1F=256'h781a5757_5b58771a_800b833d_55881954_82881908_802eab38_78225675_7627bf38;
-defparam bootram.RAM3.INIT_20=256'h800b828c_82881a0c_a83f800b_7c0551f2_80f18822_7826ef38_81185888_75337734;
-defparam bootram.RAM3.INIT_21=256'h80fa9c23_05225675_3d0d029e_3d0d04fb_fea9388e_5c837c27_82901a5a_1a0c811c;
-defparam bootram.RAM3.INIT_22=256'h3d0d81b0_800c04fa_80fa9c22_873d0d04_51eb8f3f_53845281_759fff06_85559054;
-defparam bootram.RAM3.INIT_23=256'he7a0a39f_81b0800c_0854810b_3881b084_802e81bd_51515372_2a708106_80087081;
-defparam bootram.RAM3.INIT_24=256'h7080eed0_0570832c_31741184_80eed008_d0088829_a43880ee_9abe2681_1453728c;
-defparam bootram.RAM3.INIT_25=256'h258538ff_72ffb1f0_90538c39_873880ce_ce907325_58515380_80713152_0c98e5ea;
-defparam bootram.RAM3.INIT_26=256'h2270902b_0c80f9ce_7080f9e0_f9e00816_2c752980_902b7090_f9cc2270_b1f05380;
-defparam bootram.RAM3.INIT_27=256'h18057087_f9dc0c73_2c297f80_7f317190_80f9dc08_2270902b_2980f9d0_70902c73;
-defparam bootram.RAM3.INIT_28=256'h38f08153_f0812584_538a3972_86388fff_8fff7325_56515654_5351555b_2c525755;
-defparam bootram.RAM3.INIT_29=256'h528151e3_fa3fb8db_908051fd_04fd3d0d_3f883d0d_5253fe87_83ffff06_90801370;
-defparam bootram.RAM3.INIT_2A=256'h800b9015_2398e5ea_800b8415_90732382_82055523_80c07370_cc705454_ed3f80f9;
-defparam bootram.RAM3.INIT_2B=256'h5199e83f_80c05268_3d705457_ea3d0d88_853d0d04_81b0800c_150c810b_0c800b94;
-defparam bootram.RAM3.INIT_2C=256'h38741670_09810694_7381aa2e_ff2e9d38_51547381_74177033_9d055755_80028405;
-defparam bootram.RAM3.INIT_2D=256'h0c983d0d_80547380_7527d138_811555be_81548b39_81068538_81992e09_33515473;
-defparam bootram.RAM3.INIT_2E=256'h3f800875_73519ef8_80e6cc52_80558453_5199983f_54845279_863d7054_04f93d0d;
-defparam bootram.RAM3.INIT_2F=256'h80e6d051_0d92d63f_0c04fc3d_0b81e094_3d0d0481_74800c89_83388155_2e098106;
-defparam bootram.RAM3.INIT_30=256'hb408708d_e33f81b8_3f80518d_5255e5b4_5380e6f0_81ff0670_ed3f8008_dbcb3f8e;
-defparam bootram.RAM3.INIT_31=256'h800a51fe_db933f98_80e7c051_3974b738_88518187_883880e7_51515473_2a708106;
-defparam bootram.RAM3.INIT_32=256'h98800a51_b13f7452_82ac51e0_518da93f_daff3f81_80e7ec51_802e9c38_af3f8008;
-defparam bootram.RAM3.INIT_33=256'hd03f8380_e8cc51da_2ebd3880_3f800880_0a51fed1_e43f8c80_e8a451da_83f93f80;
-defparam bootram.RAM3.INIT_34=256'h3f80e99c_f13ffed3_82ac51df_51daba3f_3f80e8f8_0a5197db_ff528c80_805380ff;
-defparam bootram.RAM3.INIT_35=256'h0d047180_943f863d_e9d851da_3f883980_805183ab_e13f8052_82ac51df_51daaa3f;
-defparam bootram.RAM3.INIT_36=256'h3f725272_a451e3ec_735280ea_3880c053_87e82e84_54a05373_fd3d0d75_f9e40c04;
-defparam bootram.RAM3.INIT_37=256'h51d89c3f_0da05280_0d04fe3d_722d853d_85387351_5372802e_80f9e408_51d8b83f;
-defparam bootram.RAM3.INIT_38=256'h0d9a518d_0d04fc3d_722d843d_85388051_5372802e_80f9e408_51d8943f_80c05280;
-defparam bootram.RAM3.INIT_39=256'h06535580_80088680_ec38820b_71802e80_53548155_70810651_8008862a_ac3fff0b;
-defparam bootram.RAM3.INIT_3A=256'h802e8338_e8547184_388a3987_71802e8e_8a388a54_71828024_802e9b38_e4547182;
-defparam bootram.RAM3.INIT_3B=256'h0780eb9c_70830672_80088a2c_882a8c06_8cdf3f71_08528551_8ce73f80_ff548451;
-defparam bootram.RAM3.INIT_3C=256'h5252d8ad_eed41108_2b8c0680_943f7182_515452d8_eadc5553_f9f00c80_11337080;
-defparam bootram.RAM3.INIT_3D=256'hb93f9e39_06a338fe_812e0981_2ea63874_e80c7482_387480f9_e8082e98_3f7480f9;
-defparam bootram.RAM3.INIT_3E=256'h3f99518b_7351fde8_0cfe9f3f_7380f9ec_082e8e38_7380f9ec_81069638_74822e09;
-defparam bootram.RAM3.INIT_3F=256'hec0c9951_ff0b80f9_80f9e80c_c13f800b_8008518b_0dd4d43f_0d04fd3d_ec3f863d;
-defparam bootram.RAM4.INIT_00=256'h518bae3f_de943f84_9a528451_8bec3fbe_80529c51_f53f81ae_5298518b_8bcb3f8d;
-defparam bootram.RAM4.INIT_01=256'h08537352_2e8d3880_3f738008_84518b99_518bcf3f_70535484_07f49f06_80089080;
-defparam bootram.RAM4.INIT_02=256'h3d0d7cd0_3d0d04f6_8ba83f85_07528051_80088480_518b823f_e1823f80_80eaf451;
-defparam bootram.RAM4.INIT_03=256'h51dc8b3f_710c578a_82c08072_83ffff52_0a075956_0a0681d0_0a077ed0_0a0681d0;
-defparam bootram.RAM4.INIT_04=256'hed3f80e1_0c7851db_82d4e677_f93f8a59_0c8a51db_81ab9977_51dc833f_71770c8a;
-defparam bootram.RAM4.INIT_05=256'h2a077183_82067187_0670852a_067081ff_7583ffff_51dbdf3f_86770c78_805a8199;
-defparam bootram.RAM4.INIT_06=256'h0676852b_077081ff_06717307_74832ba0_73109006_71730707_812a8806_2a840672;
-defparam bootram.RAM4.INIT_07=256'h71832a84_71872a07_852a8206_7a882a70_73730707_70818006_872b6306_80c00677;
-defparam bootram.RAM4.INIT_08=256'h852b80c0_81ff0676_73070770_2ba00671_90067483_07077310_88067173_0672812a;
-defparam bootram.RAM4.INIT_09=256'h586b4452_6d0c5151_83ffff06_2b7b0770_07077088_80067373_6d067081_0677872b;
-defparam bootram.RAM4.INIT_0A=256'hdaac3f75_770c7851_3f819981_5653dab6_5752575d_58525351_5a555b51_53515752;
-defparam bootram.RAM4.INIT_0B=256'h71832a84_71872a07_852a8206_81ff0670_70730770_7081ff06_0676902a_902a9680;
-defparam bootram.RAM4.INIT_0C=256'h852b80c0_81ff0676_73070770_2ba00671_90067483_07077310_88067173_0672812a;
-defparam bootram.RAM4.INIT_0D=256'h872b0770_06710772_852b80c0_10900671_7a882a70_7081ff06_78872b07_06707207;
-defparam bootram.RAM4.INIT_0E=256'h52d9ab3f_57515157_58525a5a_51555351_67405b51_680c5156_80067407_882b83fe;
-defparam bootram.RAM4.INIT_0F=256'h71872a07_852a8206_81ff0670_ffff0670_9d3f7783_0c7851d9_81998577_81a18056;
-defparam bootram.RAM4.INIT_10=256'h81ff0676_73070770_2ba00671_90067483_07077310_88067173_0672812a_71832a84;
-defparam bootram.RAM4.INIT_11=256'h2a077183_82067187_2a70852a_07077a88_80067373_7f067081_0677872b_852b80c0;
-defparam bootram.RAM4.INIT_12=256'h0676852b_077081ff_06717307_74832ba0_73109006_71730707_812a8806_2a840672;
-defparam bootram.RAM4.INIT_13=256'h5151586b_ff066d0c_077083ff_70882b7b_73730707_70818006_872b6906_80c00677;
-defparam bootram.RAM4.INIT_14=256'h9983770c_c1805581_d7f43f81_575c5653_53515752_5b515852_57525a55_44525351;
-defparam bootram.RAM4.INIT_15=256'h82067187_0670852a_077081ff_ff067073_902a7081_96800678_3f77902a_7851d7e6;
-defparam bootram.RAM4.INIT_16=256'h077081ff_06717307_74832ba0_73109006_71730707_812a8806_2a840672_2a077183;
-defparam bootram.RAM4.INIT_17=256'h852b80c0_10900671_7a882a70_73730707_70818006_872b6106_80c00677_0676852b;
-defparam bootram.RAM4.INIT_18=256'h5b515852_69425a54_6a0c5152_83ffff06_2b750770_07077088_66067173_0672872b;
-defparam bootram.RAM4.INIT_19=256'h7851d6ca_3f80770c_5252d6d2_70780c79_dd3f9985_515952d6_5a5b5751_53515852;
-defparam bootram.RAM4.INIT_1A=256'h3f71770c_5252d6ae_70780c79_b93f8880_0c7851d6_3f80f077_7851d6c2_3f71770c;
-defparam bootram.RAM4.INIT_1B=256'h8254873d_04fb3d0d_3f8c3d0d_7851d696_3f71770c_7851d69e_3f71770c_7851d6a6;
-defparam bootram.RAM4.INIT_1C=256'h80d73d08_80d53d08_ffb23d0d_873d0d04_3d22800c_839a3f86_5280d051_fc055380;
-defparam bootram.RAM4.INIT_1D=256'h9f165675_81ac39ff_51da913f_5280ebac_77538294_93269038_59577782_84120858;
-defparam bootram.RAM4.INIT_1E=256'h398cf33f_085e818c_ca3f8008_80c15ccd_56750804_80ebf805_38758429_962681a2;
-defparam bootram.RAM4.INIT_1F=256'h80ea3990_5e80d65c_83ffff06_883f8008_80fa39ff_5f80c65c_f73f8008_80085e8c;
-defparam bootram.RAM4.INIT_20=256'h0881ff06_8ae53f80_80faa051_5c80d539_a03f80c5_faa0518a_17085280_1708538c;
-defparam bootram.RAM4.INIT_21=256'h873f80d7_17085189_1708528c_94175390_c25cb939_5cbe3980_863880c4_5675802e;
-defparam bootram.RAM4.INIT_22=256'h5c805280_8f3980d3_3f80d25c_08518c93_08528c17_05539017_d03dfe80_5ca63980;
-defparam bootram.RAM4.INIT_23=256'h3d790557_771980d2_833d5a58_0554800b_d03dfdec_82945580_8339a05c_51f7f83f;
-defparam bootram.RAM4.INIT_24=256'h80ecd451_04803d0d_80d03d0d_51e1aa3f_38838082_887826ec_34811858_57753377;
-defparam bootram.RAM4.INIT_25=256'h38758117_807425b7_ff165654_57575874_7c7f7f5a_f83d0d7a_5183873f_ce833fff;
-defparam bootram.RAM4.INIT_26=256'h0651d1b3_527781ff_8a3dfc05_05348253_028405a1_81055833_3d347670_5754738a;
-defparam bootram.RAM4.INIT_27=256'hfa3d0d02_8a3d0d04_5473800c_38c13981_73802e85_51d39f3f_ff06548a_3f800881;
-defparam bootram.RAM4.INIT_28=256'h51ff893f_f75280d0_fc055381_8154883d_75883d34_8338dc56_80de5674_a3053355;
-defparam bootram.RAM4.INIT_29=256'h5256d0d3_a7053370_fc055202_8153893d_33893d34_5702ab05_f93d0d7c_883d0d04;
-defparam bootram.RAM4.INIT_2A=256'h800881ff_51ced53f_537b5275_25973876_9e388077_5473802e_ff067056_3f800881;
-defparam bootram.RAM4.INIT_2B=256'h81f75280_3dfc0553_0d815488_0d04fa3d_800c893d_38815574_73802e83_06705654;
-defparam bootram.RAM4.INIT_2C=256'h56567480_0b883d33_3f953980_e051ccb9_8a3880ec_ff065574_3f800881_d051ffa0;
-defparam bootram.RAM4.INIT_2D=256'hc0800ca6_80eb0b81_81c0940c_0d04990b_800c883d_56755574_06833881_de2e0981;
-defparam bootram.RAM4.INIT_2E=256'h0c51820b_0781c098_80067081_72882bbe_04803d0d_81c0b00c_0c89b00b_0b81c0ac;
-defparam bootram.RAM4.INIT_2F=256'h0d04803d_800c823d_81c0a808_5170f138_81065151_70812a70_81c0a408_81c0a00c;
-defparam bootram.RAM4.INIT_30=256'ha4087081_a00c81c0_840b81c0_81c09c0c_980c5173_810781c0_be800670_0d72882b;
-defparam bootram.RAM4.INIT_31=256'h57719138_06555557_7a7c7283_fa3d0d78_0d04ff39_f138823d_51515170_2a708106;
-defparam bootram.RAM4.INIT_32=256'h75279438_72555573_3f72822a_815189b2_802e8638_83065271_718a3872_75830652;
-defparam bootram.RAM4.INIT_33=256'h842a708f_3d0d7470_3d0d04fe_54e93988_54528114_08720c52_11771270_73822b77;
-defparam bootram.RAM4.INIT_34=256'h0d04fe3d_c03f843d_335253c9_80ed8011_3f728f06_5353c9cd_11335451_0680ed80;
-defparam bootram.RAM4.INIT_35=256'h3880ed90_135372e9_2e8e38ff_51527180_70810651_0870882a_5382e090_0d8386d0;
-defparam bootram.RAM4.INIT_36=256'h55558386_80c08007_8c800607_80ff067c_9b05337a_fc3d0d02_843d0d04_51ca8a3f;
-defparam bootram.RAM4.INIT_37=256'h9051c9cd_e93880ed_ff135372_802e8e38_51515271_2a708106_90087088_d05382e0;
-defparam bootram.RAM4.INIT_38=256'h5274802e_e0900c74_82800782_e0980c73_81ff0682_e0900c77_800c7382_3f7882e0;
-defparam bootram.RAM4.INIT_39=256'he93880ed_ff135372_802e8e38_51515271_2a708106_90087088_d05382e0_a9388386;
-defparam bootram.RAM4.INIT_3A=256'h55885480_940c8880_810b82e0_04fc3d0d_0c863d0d_08527180_3f82e080_9051c989;
-defparam bootram.RAM4.INIT_3B=256'hcb3f8008_528151fe_8a805381_80559054_fc3d0d88_863d0d04_51fee13f_53805280;
-defparam bootram.RAM4.INIT_3C=256'h0d04803d_af3f863d_528051fe_54865381_88805588_04fc3d0d_0c863d0d_81ff0680;
-defparam bootram.RAM4.INIT_3D=256'h2ef43882_06517080_800881ff_3d0deb3f_3d0d0480_06800c82_08813281_0dca3f80;
-defparam bootram.RAM4.INIT_3E=256'hfe9b0a06_55a05475_b43f8880_38dd3fff_8008269b_85923f75_3d0d7756_3d0d04fb;
-defparam bootram.RAM4.INIT_3F=256'h11565757_cb3d08ff_c93d0880_ba3d0d80_3d0d04ff_fdde3f87_81528051_9b0a0753;
-defparam bootram.RAM5.INIT_00=256'h883d7052_5381ff52_a7388280_80082681_84ce3f73_38751754_ff2681b4_80557381;
-defparam bootram.RAM5.INIT_01=256'h980c8880_3f7482e0_d43ffce6_fefd3ffe_518b993f_3d085273_755380cb_548cbe3f;
-defparam bootram.RAM5.INIT_02=256'he0900c8a_88a00b82_82e0980c_800c810b_0a0782e0_0a0680c0_0c76fec0_0b82e090;
-defparam bootram.RAM5.INIT_03=256'h700882e0_54fe8415_82e08c0c_80157008_558f56fe_3f80c83d_900cfcb6_a00b82e0;
-defparam bootram.RAM5.INIT_04=256'h900c8a80_800b82e0_800c5488_700882e0_54fe8c15_82e0840c_88157008_880c54fe;
-defparam bootram.RAM5.INIT_05=256'h74800c80_980c8155_800b82e0_25ffbc38_56567580_ff169016_0cfbf73f_0b82e090;
-defparam bootram.RAM5.INIT_06=256'h81577480_2680cb38_57738008_838a3f80_575a5656_7b7d7212_f93d0d79_c83d0d04;
-defparam bootram.RAM5.INIT_07=256'h77537352_83387654_57767527_74317555_a2388280_5473802e_7581ff06_2e80c338;
-defparam bootram.RAM5.INIT_08=256'h828054dc_7527e138_74548280_802e8e38_57595674_19767631_3f731674_7551fdeb;
-defparam bootram.RAM5.INIT_09=256'h1354829c_2e8d3873_54557380_76787a56_04fc3d0d_0c893d0d_81577680_39fd8c3f;
-defparam bootram.RAM5.INIT_0A=256'h707406ff_3f800830_a63981fa_0c80750c_800b8416_0b88160c_27903880_3f800874;
-defparam bootram.RAM5.INIT_0B=256'h3d0d04fd_fcc93f86_160c7151_160c7188_0c740684_08307276_81ec3f80_16565152;
-defparam bootram.RAM5.INIT_0C=256'h2e943881_08841508_81538814_802e9f38_70545271_0881ff06_fc983f80_3d0d7554;
-defparam bootram.RAM5.INIT_0D=256'h888055a0_04fc3d0d_0c853d0d_80537280_51fc943f_7088160c_08800805_b13f8814;
-defparam bootram.RAM5.INIT_0E=256'hf9f40855_fb3d0d80_863d0d04_0a06800c_8008fe80_51f9fd3f_53815281_5481f90a;
-defparam bootram.RAM5.INIT_0F=256'h5154cdc8_edac5458_56715580_81ff0670_ff068008_882a7081_d43f8008_7480c238;
-defparam bootram.RAM5.INIT_10=256'h883f9c39_edc451c3_2e8a3880_06547380_93387481_7380c02e_83388155_3f73a02e;
-defparam bootram.RAM5.INIT_11=256'hdc3f7480_cd8e3ff4_80ede451_8d387452_55827427_08ea1155_0c80f9f4_7580f9f4;
-defparam bootram.RAM5.INIT_12=256'hfefa3f81_2b800c04_810b8008_0c04f23f_ce053380_800880ee_04ff913f_0c873d0d;
-defparam bootram.RAM5.INIT_13=256'h8b0b82e0_82e0900c_0c88800b_0b82e098_f8b03f80_3d0d7d56_800c04f6_0b80082b;
-defparam bootram.RAM5.INIT_14=256'h0cf7ff3f_0b82e090_900c8aa8_a80b82e0_e0980c88_0c810b82_2b82e080_840c7c88;
-defparam bootram.RAM5.INIT_15=256'he08c0858_f7e43f82_82e0900c_0c8a800b_0b82e090_d3388880_73762780_7e558054;
-defparam bootram.RAM5.INIT_16=256'h38705380_70732783_52579053_3d767531_80085b88_085a82e0_5982e084_82e08808;
-defparam bootram.RAM5.INIT_17=256'h800b82e0_54ffa939_ec397214_34811252_70810557_51703375_91387117_52717327;
-defparam bootram.RAM5.INIT_18=256'h08528c08_8c088c05_3d0d8053_028c0cfd_a13f8c08_0d7251f6_0d04803d_980c8c3d;
-defparam bootram.RAM5.INIT_19=256'h538c088c_fd3d0d81_08028c0c_8c0c048c_54853d0d_0870800c_82de3f80_88050851;
-defparam bootram.RAM5.INIT_1A=256'h0cf93d0d_8c08028c_0d8c0c04_0c54853d_80087080_5182b93f_08880508_0508528c;
-defparam bootram.RAM5.INIT_1B=256'h0b8c08f4_88050c80_08308c08_8c088805_8025ab38_08880508_fc050c8c_800b8c08;
-defparam bootram.RAM5.INIT_1C=256'h8c050880_050c8c08_088c08fc_8c08f405_08f4050c_38810b8c_fc050888_050c8c08;
-defparam bootram.RAM5.INIT_1D=256'h810b8c08_05088838_0c8c08fc_8c08f005_050c800b_308c088c_088c0508_25ab388c;
-defparam bootram.RAM5.INIT_1E=256'ha73f8008_05085181_528c0888_088c0508_0c80538c_8c08fc05_08f00508_f0050c8c;
-defparam bootram.RAM5.INIT_1F=256'h08f80508_f8050c8c_08308c08_8c08f805_802e8c38_08fc0508_050c548c_708c08f8;
-defparam bootram.RAM5.INIT_20=256'h05088025_0c8c0888_8c08fc05_3d0d800b_028c0cfb_0c048c08_893d0d8c_70800c54;
-defparam bootram.RAM5.INIT_21=256'h388c088c_0880258c_8c088c05_08fc050c_0c810b8c_8c088805_88050830_93388c08;
-defparam bootram.RAM5.INIT_22=256'h08f8050c_8008708c_0851ad3f_8c088805_8c050852_81538c08_088c050c_0508308c;
-defparam bootram.RAM5.INIT_23=256'h0c54873d_05087080_0c8c08f8_8c08f805_f8050830_8c388c08_0508802e_548c08fc;
-defparam bootram.RAM5.INIT_24=256'h8c05088c_050c8c08_0b8c08f8_fc050c80_810b8c08_0cfd3d0d_8c08028c_0d8c0c04;
-defparam bootram.RAM5.INIT_25=256'h8c050810_99388c08_8c050824_800b8c08_802ea338_08fc0508_27ac388c_08880508;
-defparam bootram.RAM5.INIT_26=256'h8c088c05_2e80c938_fc050880_c9398c08_08fc050c_0508108c_0c8c08fc_8c088c05;
-defparam bootram.RAM5.INIT_27=256'h05088c08_0c8c08f8_8c088805_8c050831_05088c08_388c0888_050826a1_088c0888;
-defparam bootram.RAM5.INIT_28=256'h8c088c05_0508812a_0c8c088c_8c08fc05_0508812a_0c8c08fc_8c08f805_fc050807;
-defparam bootram.RAM5.INIT_29=256'h08f80508_518d398c_08f4050c_0508708c_388c0888_08802e8f_8c089005_0cffaf39;
-defparam bootram.RAM5.INIT_2A=256'h52837227_77795656_fc3d0d78_0d8c0c04_800c853d_08f40508_050c518c_708c08f4;
-defparam bootram.RAM5.INIT_2B=256'h712e0981_33525372_38743374_71ff2ea0_38ff1252_70802eb0_07830651_8c387474;
-defparam bootram.RAM5.INIT_2C=256'h74745451_863d0d04_800b800c_8106e238_71ff2e09_14545555_158115ff_06bd3881;
-defparam bootram.RAM5.INIT_2D=256'hffaf3972_70735555_8326e938_54545171_8414fc14_8f388411_2e098106_70087308;
-defparam bootram.RAM5.INIT_2E=256'h06517080_72750783_72278c38_5555558f_70797b55_fc3d0d76_863d0d04_7131800c;
-defparam bootram.RAM5.INIT_2F=256'h2e098106_125271ff_055634ff_33747081_70810554_2e983872_125271ff_2ea738ff;
-defparam bootram.RAM5.INIT_30=256'h08717084_70840554_05530c72_08717084_70840554_04745172_0c863d0d_ea387480;
-defparam bootram.RAM5.INIT_31=256'h1252718f_05530cf0_08717084_70840554_05530c72_08717084_70840554_05530c72;
-defparam bootram.RAM5.INIT_32=256'h7054ff83_8326ed38_fc125271_8405530c_54087170_72708405_72279538_26c93883;
-defparam bootram.RAM5.INIT_33=256'h2ea238ff_06517080_8a387483_55837227_33575553_8c059f05_76797102_39fc3d0d;
-defparam bootram.RAM5.INIT_34=256'h863d0d04_3874800c_098106ef_5271ff2e_5534ff12_73708105_2e933873_125271ff;
-defparam bootram.RAM5.INIT_35=256'h70840553_530c7271_71708405_27a53872_54518f72_902b0751_75077071_7474882b;
-defparam bootram.RAM5.INIT_36=256'h72717084_72279038_26dd3883_1252718f_05530cf0_72717084_8405530c_0c727170;
-defparam bootram.RAM5.INIT_37=256'h802e80d9_55555272_7a7c7054_fa3d0d78_53ff9039_26f23870_12527183_05530cfc;
-defparam bootram.RAM5.INIT_38=256'h712e0981_33565174_38713374_72ff2eb1_38ff1353_802e80d4_83065170_38717407;
-defparam bootram.RAM5.INIT_39=256'h5272ff2e_ff155555_81128115_2e80fc38_06517080_387081ff_802e8187_06a93872;
-defparam bootram.RAM5.INIT_3A=256'h883d0d04_5270800c_71315152_81ff0671_81ff0675_33565170_38713374_098106d1;
-defparam bootram.RAM5.INIT_3B=256'h2eb13874_13537280_ff9739fc_74765552_082e8838_38710874_83732788_71745755;
-defparam bootram.RAM5.INIT_3C=256'h837327d0_84175755_9a388415_51515170_82818006_0670f884_fbfdff12_087009f7;
-defparam bootram.RAM5.INIT_3D=256'h80eea408_3d0d800b_3d0d04fd_0b800c88_fedf3980_74765552_082ed038_38740876;
-defparam bootram.RAM5.INIT_3E=256'h9d3f8008_8151ffb0_80eee852_ffa8ad3f_ffa9913f_80f9f80c_2e9e3873_54547281;
-defparam bootram.RAM5.INIT_3F=256'h0851f686_b0803f80_528151ff_3f80eee8_3fffa890_0cffa8f4_7280f9f8_51f6a33f;
-defparam bootram.RAM6.INIT_00=256'h525270ff_fc127008_9138702d_5270ff2e_05700852_eef00bfc_ff3d0d80_3f00ff39;
-defparam bootram.RAM6.INIT_01=256'h6e20636f_6f722069_21457272_00000040_a99f3f04_0d0404ff_f138833d_2e098106;
-defparam bootram.RAM6.INIT_02=256'h65642063_70656374_3a204578_646c6572_2068616e_636b6574_6c207061_6e74726f;
-defparam bootram.RAM6.INIT_03=256'h676f7420_62757420_25642c20_62657220_206e756d_6c697479_74696269_6f6d7061;
-defparam bootram.RAM6.INIT_04=256'h2068616e_636b6574_6c207061_6e74726f_6e20636f_6f722069_21457272_25640a00;
-defparam bootram.RAM6.INIT_05=256'h68202564_656e6774_6164206c_61796c6f_65642070_70656374_3a204578_646c6572;
-defparam bootram.RAM6.INIT_06=256'h616e6765_6b206368_206c696e_0a657468_0a000000_74202564_7420676f_2c206275;
-defparam bootram.RAM6.INIT_07=256'h44502062_31302055_50204e32_0a555352_640a0000_203d2025_70656564_643a2073;
-defparam bootram.RAM6.INIT_08=256'h7479206e_62696c69_70617469_20636f6d_46504741_720a0000_6f616465_6f6f746c;
-defparam bootram.RAM6.INIT_09=256'h62696c69_70617469_20636f6d_77617265_4669726d_640a0000_723a2025_756d6265;
-defparam bootram.RAM6.INIT_0A=256'h69702072_476f7420_00000000_61646472_640a0000_723a2025_756d6265_7479206e;
-defparam bootram.RAM6.INIT_0B=256'h0000078f_000006df_000006f6_00000000_65743a20_7061636b_65727920_65636f76;
-defparam bootram.RAM6.INIT_0C=256'h00000713_0000078f_0000078f_0000078f_0000078f_0000078f_00000765_0000078f;
-defparam bootram.RAM6.INIT_0D=256'h0000067a_0000078f_0000078f_0000078f_0000078f_0000066d_0000078f_000006a7;
-defparam bootram.RAM6.INIT_0E=256'h20636869_4c4d5331_00000753_00000746_0000073f_00000738_00000733_0000072e;
-defparam bootram.RAM6.INIT_0F=256'h70207665_20636869_4c4d5332_0a000000_30782578_6e203d20_7273696f_70207665;
-defparam bootram.RAM6.INIT_10=256'h15290a94_3fff0000_0050c285_c0a80a02_0a000000_30782578_6e203d20_7273696f;
-defparam bootram.RAM6.INIT_11=256'h696c6564_47206661_4348444f_20574154_72656164_6932635f_01c300e2_054a0387;
-defparam bootram.RAM6.INIT_12=256'h61696c65_4f472066_54434844_72205741_5f786665_5f666f72_77616974_21000000;
-defparam bootram.RAM6.INIT_13=256'h64210000_61696c65_4f472066_54434844_65205741_77726974_6932635f_64210000;
-defparam bootram.RAM6.INIT_14=256'h43444546_38394142_34353637_30313233_2e256400_642e2564_25642e25_45000000;
-defparam bootram.RAM6.INIT_15=256'h69676e6d_6420616c_3a206261_5f706b74_73656e64_ffff0000_ffffffff_00000000;
-defparam bootram.RAM6.INIT_16=256'h636f6d6d_6e65745f_66000000_72206275_6e642f6f_656e2061_6f66206c_656e7420;
-defparam bootram.RAM6.INIT_17=256'h696e6720_6c6f6f6b_63686520_74206361_6f206869_65642074_6661696c_6f6e3a20;
-defparam bootram.RAM6.INIT_18=256'h697a6520_72642073_20776569_6172703a_646c655f_0a68616e_00000000_666f7220;
-defparam bootram.RAM6.INIT_19=256'h67746873_206c656e_74656e74_6e736973_696e636f_55445020_0a000000_3d202564;
-defparam bootram.RAM6.INIT_1A=256'h73206265_68206861_466c6173_53504920_0b0b0b0b_00000000_2025640a_3a202564;
-defparam bootram.RAM6.INIT_1B=256'h6d616765_6f6e2069_75637469_50726f64_65640000_616c697a_6e697469_656e2069;
-defparam bootram.RAM6.INIT_1C=256'h61666520_696e2073_50322b20_20555352_74696e67_53746172_640a0000_203d2025;
-defparam bootram.RAM6.INIT_1D=256'h00000000_6172652e_69726d77_66652066_67207361_6164696e_2e204c6f_6d6f6465;
-defparam bootram.RAM6.INIT_1E=256'h6e204650_6374696f_726f6475_69642070_2076616c_20666f72_6b696e67_43686563;
-defparam bootram.RAM6.INIT_1F=256'h20465047_74696f6e_6f647563_64207072_56616c69_2e2e2e00_6d616765_47412069;
-defparam bootram.RAM6.INIT_20=256'h20626f6f_6720746f_7074696e_7474656d_642e2041_666f756e_61676520_4120696d;
-defparam bootram.RAM6.INIT_21=256'h20696d61_46504741_696f6e20_64756374_2070726f_616c6964_4e6f2076_742e0000;
-defparam bootram.RAM6.INIT_22=256'h20666972_74696f6e_6f647563_64207072_56616c69_2e0a0000_6f756e64_67652066;
-defparam bootram.RAM6.INIT_23=256'h73686564_46696e69_2e2e2e00_64696e67_204c6f61_756e642e_6520666f_6d776172;
-defparam bootram.RAM6.INIT_24=256'h4552524f_2e000000_6d616765_6e672069_61727469_2e205374_64696e67_206c6f61;
-defparam bootram.RAM6.INIT_25=256'h20546869_72616d21_70726f67_61696e20_6f6d206d_6e206672_65747572_523a2052;
-defparam bootram.RAM6.INIT_26=256'h616c6964_4e6f2076_6e210000_61707065_65722068_206e6576_6f756c64_73207368;
-defparam bootram.RAM6.INIT_27=256'h46616c6c_6e642e20_20666f75_77617265_6669726d_696f6e20_64756374_2070726f;
-defparam bootram.RAM6.INIT_28=256'h77617265_6669726d_2d696e20_75696c74_746f2062_75676820_7468726f_696e6720;
-defparam bootram.RAM6.INIT_29=256'h00000000_4e4f4e45_00000000_2025640a_7420746f_64207365_53706565_2e000000;
-defparam bootram.RAM6.INIT_2A=256'h65746865_43000000_45545249_53594d4d_58000000_57455f52_58000000_57455f54;
-defparam bootram.RAM6.INIT_2B=256'h4e45475f_4155544f_5048595f_6c3a2000_6e74726f_7720636f_20666c6f_726e6574;
-defparam bootram.RAM6.INIT_2C=256'h00000000_780a0000_20307825_20676f74_7825782c_74652030_2077726f_4144563a;
-defparam bootram.RAM6.INIT_2D=256'h20706163_64617465_6e207570_6f722069_21457272_00030203_00000001_00030003;
-defparam bootram.RAM6.INIT_2E=256'h64206c65_796c6f61_64207061_65637465_20457870_6c65723a_68616e64_6b657420;
-defparam bootram.RAM6.INIT_2F=256'h00002466_000023d0_00000000_2025640a_20676f74_20627574_2025642c_6e677468;
-defparam bootram.RAM6.INIT_30=256'h00002466_00002466_00002466_00002466_000023dd_000023ff_00002414_00002466;
-defparam bootram.RAM6.INIT_31=256'h00002443_00002466_00002466_00002466_00002466_00002466_00002466_00002466;
-defparam bootram.RAM6.INIT_32=256'h00000000_6f72740a_0a0a6162_00002430_000023ef_00002466_00002466_0000245a;
-defparam bootram.RAM6.INIT_33=256'h67000000_20666c61_626f6f74_61666520_61642073_6f207265_65642074_4661696c;
-defparam bootram.RAM6.INIT_34=256'h54434844_74205741_5f776169_73706966_43444546_38394142_34353637_30313233;
-defparam bootram.RAM6.INIT_35=256'h697a653d_25642073_7970653d_73682074_0a666c61_64210000_61696c65_4f472066;
-defparam bootram.RAM6.INIT_36=256'h6e67210a_63687475_652e2041_20747970_6c617368_6e672066_0a57726f_25640a00;
-defparam bootram.RAM6.INIT_37=256'h6874756e_64204163_653a2025_2073697a_6c617368_6e672066_0a57726f_00000000;
-defparam bootram.RAM6.INIT_38=256'hffffff00_ffff00ff_ff00ffff_00ffffff_65000000_792e6578_64756d6d_67210a00;
-defparam bootram.RAM6.INIT_39=256'h01010100_3fff0000_0050c285_c0a80a02_00003778_00000000_00000000_00000000;
-defparam bootram.RAM6.INIT_3A=256'h00003548_00003540_00003538_03197500_000c0000_00190010_ffff0033_04000400;
-defparam bootram.RAM6.INIT_3B=256'h00000000_00000000_ffffffff_00000000_ffffffff_00003704_10101200_00003550;
-defparam bootram.RAM6.INIT_3C=256'h00000000_00000000_00000000_00000000_00000000_00000000_00000000_00000000;
+defparam bootram.RAM0.INIT_3D=256'h04fd3d0d_3f943d0d_80519b99_ed388380_58887826_77348118_57577533_963d7905;
+defparam bootram.RAM0.INIT_3E=256'h52725186_80c05372_e82e8438_a0537387_802e9838_92883f73_e1e45254_75705380;
+defparam bootram.RAM0.INIT_3F=256'h0d82903f_0d04fa3d_b03f853d_52735186_b83f80c0_52735186_3f9039a0_c43f9ba6;
+defparam bootram.RAM1.INIT_00=256'hefbc0cf9_3f820b80_c05191ba_8c5280e2_5191c33f_5280e2a0_87a93f89_80e28451;
+defparam bootram.RAM1.INIT_01=256'h9c0c82d6_800b81e0_81e09c0c_e93f810b_84803f84_0cabdf3f_0b80efb8_cd909299;
+defparam bootram.RAM1.INIT_02=256'h80085483_3f84ce3f_f63f869e_8008518f_3f84da3f_dc3f86aa_8008518f_3f84863f;
+defparam bootram.RAM1.INIT_03=256'h52838080_ac3f8c93_8def3f94_52800851_3f838084_a23f84bd_80085194_e83f7352;
+defparam bootram.RAM1.INIT_04=256'h51a5843f_3f838092_825194d3_a8528380_de3f80c7_80845194_8ab25283_5194e83f;
+defparam bootram.RAM1.INIT_05=256'hc9387680_08802e80_80085680_518dea3f_883dfc05_3faecf3f_bd51acaa_8dda3f8f;
+defparam bootram.RAM1.INIT_06=256'hcca63f80_90055180_e4528008_845380e2_8106ad38_fdee2e09_55557382_088e0522;
+defparam bootram.RAM1.INIT_07=256'h74527551_fd3f8839_3f735183_da3f8582_7052548e_e93f9416_e2ec518f_089a3880;
+defparam bootram.RAM1.INIT_08=256'ha13f86f2_85f63f8b_3f91b13f_3d0d84cb_ff9e39fe_3f8be93f_f73fa4d9_9a8d3f8c;
+defparam bootram.RAM1.INIT_09=256'h82ac518a_5183ea3f_3f845284_ac518ae0_83f73f82_9f528051_51849b3f_3f9f5280;
+defparam bootram.RAM1.INIT_0A=256'h82539f52_518ab93f_d03f82ac_52905183_8ac63f90_3f82ac51_885183dd_d33f8852;
+defparam bootram.RAM1.INIT_0B=256'h8025df38_ff135372_518a9d3f_b43f80e4_529c5183_8aaa3f9f_3f80e451_805183c1;
+defparam bootram.RAM1.INIT_0C=256'h5683760c_0d81e080_0d04fb3d_800c843d_983f810b_52815183_83bc3f9f_9f529e51;
+defparam bootram.RAM1.INIT_0D=256'h5190a93f_53815281_90548880_760c8655_89e63f83_0c80e451_ef3f8076_80e45189;
+defparam bootram.RAM1.INIT_0E=256'he488518d_80085280_5190913f_53825281_90548880_893f8655_e3ec518e_80085280;
+defparam bootram.RAM1.INIT_0F=256'h279e3872_80537276_81705654_787a5757_04fa3d0d_0c873d0d_3f810b80_f13fa6e1;
+defparam bootram.RAM1.INIT_10=256'h74740751_1353df39_38805581_81ff2e83_71335271_83388054_5270802e_17703352;
+defparam bootram.RAM1.INIT_11=256'h5280eec4_5380e4a8_efc43486_0d810b80_0d04fe3d_800c883d_38815170_70802e83;
+defparam bootram.RAM1.INIT_12=256'h873d7054_c4348654_810b80ef_5574bd38_80efc433_04f93d0d_3f843d0d_5180c798;
+defparam bootram.RAM1.INIT_13=256'h0881ff06_fef33f80_86527551_802e9d38_ff065574_3f800881_d051b5d0_56825280;
+defparam bootram.RAM1.INIT_14=256'h80efc034_0d04810b_800c893d_80eec40b_80c6cd3f_80eec451_86537552_55748d38;
+defparam bootram.RAM1.INIT_15=256'h873dfc05_c0348454_810b80ef_5574b938_80efc033_04fb3d0d_80eec00c_80e4a408;
+defparam bootram.RAM1.INIT_16=256'h903f8008_fc0551fe_8452873d_802e9938_ff065574_3f800881_d051b4f0_538c5280;
+defparam bootram.RAM1.INIT_17=256'h5475538c_0d775684_0d04fb3d_800c873d_80eec00b_80eec00c_74863875_81ff0655;
+defparam bootram.RAM1.INIT_18=256'hc0347480_810b80ef_80eec00c_8d387508_5574802e_0881ff06_b3b63f80_5280d051;
+defparam bootram.RAM1.INIT_19=256'h0c51823d_0c81e08c_7080efc8_c8080607_067180ef_73097375_04803d0d_0c873d0d;
+defparam bootram.RAM1.INIT_1A=256'h3d0d0481_980c5182_cc0c81e0_077080ef_efcc0806_75067180_0d730973_0d04803d;
+defparam bootram.RAM1.INIT_1B=256'h5181b63f_0d8a5280_0d04ff3d_800c843d_81c73f72_53538051_3d0d7470_af3f04fe;
+defparam bootram.RAM1.INIT_1C=256'hff065376_81157481_802e9038_06545472_337081ff_79565674_fb3d0d77_833d0d04;
+defparam bootram.RAM1.INIT_1D=256'hfe3d0d74_833d0d04_8051cd3f_3d0d7352_3d0d04ff_0b800c87_3fe53980_52558191;
+defparam bootram.RAM1.INIT_1E=256'h8051dd3f_3d0d7352_3d0d04ff_0b800c84_80e73f80_8a527251_53ffbd3f_76537052;
+defparam bootram.RAM1.INIT_1F=256'h82908005_0d73a029_0d04ff3d_1234823d_3380eecc_51028f05_803d0d72_833d0d04;
+defparam bootram.RAM1.INIT_20=256'h51c63f80_13335272_5380eecc_fe3d0d80_833d0d04_720c5351_b0057022_751080e4;
+defparam bootram.RAM1.INIT_21=256'h748a2e09_76785654_04fc3d0d_38843d0d_827325e5_3f811353_527251ce_eed01333;
+defparam bootram.RAM1.INIT_22=256'h90800554_73a02982_7351de3f_87388d52_2e098106_33537281_80eecc14_81069538;
+defparam bootram.RAM1.INIT_23=256'h11085252_90800588_74a02982_04fe3d0d_0c863d0d_38748c15_72802ef8_84140853;
+defparam bootram.RAM1.INIT_24=256'heed82270_a8880c80_0d800b81_0d04ff3d_800c843d_12085372_2e853890_ff537080;
+defparam bootram.RAM1.INIT_25=256'h0d787a02_0d04fb3d_880c833d_800b81a8_840c5181_882a81a8_a8800c70_81ff0681;
+defparam bootram.RAM1.INIT_26=256'h81065151_70862a70_81a89008_8386d053_2e81c738_81527380_33575556_88059f05;
+defparam bootram.RAM1.INIT_27=256'h81a88c0c_74108107_52819f39_fde53f72_80e4bc51_5372e938_9338ff13_5271802e;
+defparam bootram.RAM1.INIT_28=256'h38ff1353_71802e8e_06515152_812a7081_a8900870_86d05381_a8900c83_81900b81;
+defparam bootram.RAM1.INIT_29=256'h802e80cf_51515271_70813251_2a708106_90087087_ae3f81a8_e4d851fd_72e93880;
+defparam bootram.RAM1.INIT_2A=256'h90087081_d05381a8_900c8386_527181a8_2e8338a0_e8527381_80c53880_3873802e;
+defparam bootram.RAM1.INIT_2B=256'h08527176_3f81a88c_d851fcdf_e93880e4_ff135372_802e8e38_51515271_2a708106;
+defparam bootram.RAM1.INIT_2C=256'h04fb3d0d_0c873d0d_900c7180_c00b81a8_52883980_ffb73981_34ff1454_70810558;
+defparam bootram.RAM1.INIT_2D=256'h71802e93_06515152_862a7081_a8900870_86d05381_57555683_059f0533_787a0288;
+defparam bootram.RAM1.INIT_2E=256'h73802e84_0c81d052_1081a88c_81bb3974_8a3f7252_e4f851fc_72e93880_38ff1353;
+defparam bootram.RAM1.INIT_2F=256'h2e8e38ff_51527180_70810651_0870812a_5381a890_0c8386d0_7181a890_38819052;
+defparam bootram.RAM1.INIT_30=256'h5271802e_32515151_81067081_70872a70_81a89008_51fbcc3f_3880e4d8_135372e9;
+defparam bootram.RAM1.INIT_31=256'h900c8386_527181a8_2e833890_d0527381_a88c0c80_38753381_802e80d8_80e23873;
+defparam bootram.RAM1.INIT_32=256'hd851faf7_e93880e4_ff135372_802e8e38_51515271_2a708106_90087081_d05381a8;
+defparam bootram.RAM1.INIT_33=256'h56ffa439_16ff1555_2e8e3881_51527180_81325151_70810670_0870872a_3f81a890;
+defparam bootram.RAM1.INIT_34=256'h74259b38_54805372_fd3d0d75_873d0d04_5271800c_a8900c80_80c00b81_81528a39;
+defparam bootram.RAM1.INIT_35=256'h0d04ff3d_e239853d_38811353_8f7127f1_515181cb_08707331_5281b8ac_81b8ac08;
+defparam bootram.RAM1.INIT_36=256'h8c528751_8c0c80fa_ff0b8280_8280840c_800cef0b_e00b8280_80880c81_0dff0b82;
+defparam bootram.RAM1.INIT_37=256'h0982808c_80880870_fb3d0d82_833d0d04_8025f138_ff115170_8405540c_9ee47270;
+defparam bootram.RAM1.INIT_38=256'h52712d74_72517308_802e8f38_76065271_8c555574_810b80fa_51528053_08710658;
+defparam bootram.RAM1.INIT_39=256'h52718726_ff3d0d73_873d0d04_7325dc38_57555387_84157610_8f398113_82808c0c;
+defparam bootram.RAM1.INIT_3A=256'h0c535152_06828088_88087072_70098280_5181722b_0575710c_2980fa8c_9f387184;
+defparam bootram.RAM1.INIT_3B=256'h803d0d81_833d0d04_81e0c80c_e0c40c52_74700881_02920522_04ff3d0d_833d0d04;
+defparam bootram.RAM1.INIT_3C=256'h04fe3d0d_0c823d0d_0b81e0c0_2ef33882_51517080_08708406_0c81b8a0_0b81e0c0;
+defparam bootram.RAM1.INIT_3D=256'h80529a39_53538180_902a710c_a0087571_933881b8_5272802e_70810654_81b8a008;
+defparam bootram.RAM1.INIT_3E=256'h843d0d04_5271800c_ffa63f72_51f7dc3f_3880e594_71802e8b_81065152_71812a70;
+defparam bootram.RAM1.INIT_3F=256'hff3d0d02_823d0d04_800b800c_f2388180_5170802e_80c00651_b8a00870_803d0d81;
+defparam bootram.RAM2.INIT_00=256'h0b81e0c0_2ef33884_51517080_08709006_5281b8a0_81e0c00c_902b8807_8e052270;
+defparam bootram.RAM2.INIT_01=256'haccd3f81_70335252_ae3f7214_38ba51f6_72802e86_75548053_04fd3d0d_0c833d0d;
+defparam bootram.RAM2.INIT_02=256'h33535680_11335470_11335581_11335682_3d0d7783_3d0d04fb_27e63885_13538573;
+defparam bootram.RAM2.INIT_03=256'h515b5f5d_30709f2a_bb053370_63029005_0d7c7e61_0d04f63d_ed3f873d_e5985180;
+defparam bootram.RAM2.INIT_04=256'h55785480_26943879_30577777_51782d76_387952ad_75802e8a_80258f38_5b595776;
+defparam bootram.RAM2.INIT_05=256'h51782d8c_e5a40533_3f800880_7651b593_bd3f7752_800851ff_51b4fb3f_53775276;
+defparam bootram.RAM2.INIT_06=256'h08a1c35c_70840552_0d8c3d70_0d04f73d_963f823d_053351f5_3d0d028b_3d0d0480;
+defparam bootram.RAM2.INIT_07=256'hdb388119_09810680_5675a52e_7681ff06_2e81d138_57577580_7081ff06_5a587833;
+defparam bootram.RAM2.INIT_08=256'h3875802e_80e3248a_2eb93875_387580e3_80f024a0_80fb3875_7580f02e_70335759;
+defparam bootram.RAM2.INIT_09=256'h7580f32e_f5248b38_ac387580_7580f52e_38818b39_e42e80c6_95397580_819e3881;
+defparam bootram.RAM2.INIT_0A=256'h792d80da_80527551_33525956_84198312_80ec3977_f82eba38_f5397580_80db3880;
+defparam bootram.RAM2.INIT_0B=256'ha1c35481_59568055_19710852_90397784_c3548053_568055a1_71085259_39778419;
+defparam bootram.RAM2.INIT_0C=256'h39778419_fdd03f9e_90527551_c3548053_568055a1_71085259_39778419_538a5292;
+defparam bootram.RAM2.INIT_0D=256'h59fea339_ec398119_3351792d_70810558_38805276_75802e8e_56763356_71085959;
+defparam bootram.RAM2.INIT_0E=256'h81065151_2a813270_b408708c_3d0d81b8_e40c0480_8a0b81e5_8b3d0d04_800b800c;
+defparam bootram.RAM2.INIT_0F=256'h55575454_72810655_982b7b07_9b053372_7b028805_fc3d0d79_823d0d04_5170ef38;
+defparam bootram.RAM2.INIT_10=256'ha0743179_820a0752_2e863871_51517080_2a708106_07527282_3871810a_70802e86;
+defparam bootram.RAM2.INIT_11=256'h742bff05_ff953f81_802e9338_0c745174_7081e5ec_81e5e80c_ffa93f71_712b5151;
+defparam bootram.RAM2.INIT_12=256'h7274278f_55558053_76787a54_04fc3d0d_0c863d0d_52527080_70720651_81b88008;
+defparam bootram.RAM2.INIT_13=256'h0672902a_7183ffff_802e8d38_902a5170_51ee3971_81155553_70227305_38721015;
+defparam bootram.RAM2.INIT_14=256'h80efdc0c_3f767008_d451b6c4_755280ef_3d0d8653_3d0d04fd_71800c86_0552ec39;
+defparam bootram.RAM2.INIT_15=256'h833d0d04_8025f338_12525270_0c8812ff_89518072_80efe452_04ff3d0d_54853d0d;
+defparam bootram.RAM2.INIT_16=256'h52897225_12881252_2e8e3881_22547274_e0525270_800b80ef_96052253_fd3d0d02;
+defparam bootram.RAM2.INIT_17=256'h802e8938_c73f8008_06535856_7183ffff_3d0d787a_3d0d04fa_70800c85_ee388051;
+defparam bootram.RAM2.INIT_18=256'h2e8f3881_55527180_73088815_e0555555_e40b80ef_800880ef_050cad39_76800884;
+defparam bootram.RAM2.INIT_19=256'h7054933d_f13d0d86_883d0d04_7684140c_3f757323_eb38a381_55897525_15881454;
+defparam bootram.RAM2.INIT_1A=256'h8405a205_3f908002_0551b584_52913ddc_923d8805_933f7353_055254b5_53923dd6;
+defparam bootram.RAM2.INIT_1B=256'h2380c091_8405aa05_81808002_0b8c3d23_a6052380_80028405_0b8b3d23_23818a80;
+defparam bootram.RAM2.INIT_1C=256'h08028405_fdb73f80_3de40551_538a5291_5d665e80_ae052368_80028405_0b8d3d23;
+defparam bootram.RAM2.INIT_1D=256'h0523ac53_028405be_913d2380_0523800b_028405ba_23963d22_3d22903d_ae052398;
+defparam bootram.RAM2.INIT_1E=256'h973d2386_805b800b_04e83d0d_3f913d0d_0551a4f4_29829884_526980c0_913dd405;
+defparam bootram.RAM2.INIT_1F=256'hf2052202_e33f0280_f80551b3_d4529a3d_865380ef_51b3f13f_9a3df205_539b3d52;
+defparam bootram.RAM2.INIT_20=256'h3d0845a3_436e44a1_1143f005_0b9b3dc4_08585a80_3f800880_0523f7d8_840580e2;
+defparam bootram.RAM2.INIT_21=256'h08701a78_56845875_06408c3d_088305fc_085fa33d_6e5ea13d_845c905d_3d084659;
+defparam bootram.RAM2.INIT_22=256'h0654738c_9a387383_5473802e_760c7508_27843873_5a557375_71315156_7c319080;
+defparam bootram.RAM2.INIT_23=256'ha3c63f75_08527651_08539416_eee53f75_80e5c051_802e8838_83065473_38941608;
+defparam bootram.RAM2.INIT_24=256'hf6de3f9a_78822a51_3880c059_78bf2684_25ffac38_59577780_0817ff19_70840557;
+defparam bootram.RAM2.INIT_25=256'h0523800b_840580ca_055a7902_237f1f94_800b943d_4040818a_3d0d6b6e_3d0d04ea;
+defparam bootram.RAM2.INIT_26=256'hd2052380_02840580_963d2380_80075a79_236980c0_0580ce05_80800284_953d2381;
+defparam bootram.RAM2.INIT_27=256'h0523913d_840580d2_095a7902_e03f8008_70525cfa_8a52933d_68478053_efdc0846;
+defparam bootram.RAM2.INIT_28=256'h51f6ac3f_f7b83f7a_80e5ec51_5a799238_0881ff06_8ac83f80_70535c5e_7053983d;
+defparam bootram.RAM2.INIT_29=256'h5b5b7933_7b1d7c1f_8053805c_557b5490_6b575d94_6d596058_39027f5a_ecd43fa9;
+defparam bootram.RAM2.INIT_2A=256'h238d3d22_05228a3d_7f5802ae_04f73d0d_3f983d0d_ef38fd89_5c867c26_7b34811c;
+defparam bootram.RAM2.INIT_2B=256'hf8055391_88548b3d_77567e55_05a60523_23800284_57768b3d_05238818_028405a2;
+defparam bootram.RAM2.INIT_2C=256'h8f3d3484_0523860b_028405b2_3d239080_0d810b8e_0d04ee3d_9e3f8b3d_527d51fe;
+defparam bootram.RAM2.INIT_2D=256'h3fe9ea3f_0551b0a0_52943dec_86538008_23e99a3f_8405b605_05348102_028405b5;
+defparam bootram.RAM2.INIT_2E=256'h80080843_3fe9ce3f_0551b19d_52943df6_3f865380_0551b090_52943df2_84538008;
+defparam bootram.RAM2.INIT_2F=256'h1b337a34_5a80e5b8_805b7a1c_54908653_943de405_80569c55_80588057_025c8059;
+defparam bootram.RAM2.INIT_30=256'h862e0981_5f5d7d90_088e1122_3d0daa3d_3d0d04d9_fbcb3f94_7b26ef38_811b5b86;
+defparam bootram.RAM2.INIT_31=256'h3f86ee39_9c51f596_795280e6_9b268d38_055b5b79_088429f2_901dac3d_06829d38;
+defparam bootram.RAM2.INIT_32=256'h225a798c_d438841b_09810686_7990802e_821b225a_0686e238_812e0981_7a225a79;
+defparam bootram.RAM2.INIT_33=256'h3fa81d70_52408885_389e1d70_810686b9_79812e09_861b225a_0686c638_842e0981;
+defparam bootram.RAM2.INIT_34=256'h868f38a7_085c8008_add23f80_ffa80551_dc52a93d_845380ef_3f800843_525f87fd;
+defparam bootram.RAM2.INIT_35=256'h841b33a2_80fe0523_22028405_3d23821b_3f7a22a1_7951aeb0_80efd452_3d5a8653;
+defparam bootram.RAM2.INIT_36=256'h51adfd3f_a93de405_86537952_81820523_82028405_81810534_33028405_3d34851b;
+defparam bootram.RAM2.INIT_37=256'h3f79537f_7a51ade0_53981d52_8e055b86_ef3f0281_05525aad_53aa3dea_8470547f;
+defparam bootram.RAM2.INIT_38=256'h7c575d9c_7c597c58_3f027c5a_7e51adc8_86537a52_3f9e3d5f_0551add4_52a93df4;
+defparam bootram.RAM2.INIT_39=256'h3f84ee39_ef38f999_5c867c26_7b34811c_5b5b7933_7b1d7f1d_05547d53_55a93ddc;
+defparam bootram.RAM2.INIT_3A=256'h3879882a_810684d1_60842e09_2a435b5b_7022708c_e438901d_09810684_7d90802e;
+defparam bootram.RAM2.INIT_3B=256'h865380e5_b4387e5e_065f7e84_2280ffff_c038861b_09810684_5a79852e_708f0651;
+defparam bootram.RAM2.INIT_3C=256'hcb3f8008_535b5cab_efdc5470_1c625580_815e7e90_80088338_51abe13f_b852821d;
+defparam bootram.RAM2.INIT_3D=256'hec11405d_33821c22_b83f891b_9c1d5184_38881d52_802e8481_7d87387b_8338815c;
+defparam bootram.RAM2.INIT_3E=256'h42407d7a_11225d5d_08a41f84_8c1b087a_0683de38_912e0981_81bb387f_407f812e;
+defparam bootram.RAM2.INIT_3F=256'hc33f8008_535d5df5_1d821d22_39ac1de4_e53f83bd_e6bc51f1_537d5280_2e8f3879;
+defparam bootram.RAM3.INIT_00=256'hbf3f9c3d_527951ab_5a88537d_3d993d5f_237f499a_7a22993d_2e83a638_42800880;
+defparam bootram.RAM3.INIT_01=256'hab9e3f88_05527951_a93dffb4_60478853_22973d23_b33f821b_527f51ab_40885379;
+defparam bootram.RAM3.INIT_02=256'h1c5c887c_337b3481_1f5b5b79_5c7b1d7c_7e843d5e_7b567c55_51ab953f_5379527d;
+defparam bootram.RAM3.INIT_03=256'h792d82ad_8405085a_26ef3861_1b5b887b_051c3481_79330284_5b7f1b5a_26ef3880;
+defparam bootram.RAM3.INIT_04=256'h5a79832e_39811a33_bb388295_7d882e81_832e8a38_405b427d_a41e7033_398c1b08;
+defparam bootram.RAM3.INIT_05=256'h51f4813f_f4387c22_09810681_5c79912e_12335c5e_80c01e89_a238ac1d_09810681;
+defparam bootram.RAM3.INIT_06=256'h537a527d_3d5c5e88_4b983d9b_9b3d2379_085a7c22_fe388c1c_08802e80_80084180;
+defparam bootram.RAM3.INIT_07=256'h8853a93d_3d23794d_821d229d_901c085a_51a9ed3f_537d527f_963d4088_51a9f93f;
+defparam bootram.RAM3.INIT_08=256'h7c1f5b5b_5e5c7b1d_557e843d_3f7e567e_7d51a9cc_88537a52_51a9d53f_cc05527a;
+defparam bootram.RAM3.INIT_09=256'h7b26ef38_811b5b88_84051c34_5a793302_805b7f1b_7c26ef38_811c5c88_79337b34;
+defparam bootram.RAM3.INIT_0A=256'h840580cd_3d347e02_5d5d7e95_ac1de41d_3f80de39_e951e497_5a792d80_60840508;
+defparam bootram.RAM3.INIT_0B=256'h6052943d_05237e53_840580d2_861a2202_22963d23_0523841a_840580ce_05347e02;
+defparam bootram.RAM3.INIT_0C=256'h05237b56_840580ce_095a7902_c03f8008_527c51f1_537b812a_cc3f8008_70525bf1;
+defparam bootram.RAM3.INIT_0D=256'h727427a4_b0085553_800b80f0_04fc3d0d_3fa93d0d_6151f5f7_7a537f52_7c557d54;
+defparam bootram.RAM3.INIT_0E=256'h81135373_72518b39_81068538_70752e09_8c135351_56517108_80f0b854_38767008;
+defparam bootram.RAM3.INIT_0F=256'h25ba3880_3f800880_5755ffb9_77797153_04fb3d0d_0c863d0d_ff517080_7326e738;
+defparam bootram.RAM3.INIT_10=256'h0c547310_0680f0b4_08811187_3980f0b4_f0b00c8e_38811480_73872689_f0b00854;
+defparam bootram.RAM3.INIT_11=256'h08055486_80081080_14519439_5280f0bc_54865375_b8120c51_760880f0_1470822b;
+defparam bootram.RAM3.INIT_12=256'h73800824_d83f8054_0d7551fe_0d04fd3d_8f3f873d_bc0551a7_842980f0_53755273;
+defparam bootram.RAM3.INIT_13=256'h0c853d0d_81547380_51a6e53f_bc055276_842980f0_54865373_10800805_99388008;
+defparam bootram.RAM3.INIT_14=256'h7107800c_07831633_70882b72_07821433_2b71902b_12337198_75703381_04fd3d0d;
+defparam bootram.RAM3.INIT_15=256'hff068b3d_387383ff_595776a8_f1982256_0d7d7f80_0d04f93d_5452853d_52535456;
+defparam bootram.RAM3.INIT_16=256'h2380c039_51547674_80f19c05_14709029_38739029_832680d3_52565473_22707231;
+defparam bootram.RAM3.INIT_17=256'h52739029_88538a3d_90291554_26ad3874_57547483_70723157_068d3d22_7383ffff;
+defparam bootram.RAM3.INIT_18=256'h56ec3989_9c3f8116_547451e2_17703353_27913875_80567578_51a5d53f_80f19c05;
+defparam bootram.RAM3.INIT_19=256'h140c800b_800b8288_54807323_80f19c54_9823800b_052280f1_3d0d029a_3d0d04fc;
+defparam bootram.RAM3.INIT_1A=256'h38863d0d_837427d9_90145454_3f811482_0551ef9b_f1982274_b5aa5280_828c140c;
+defparam bootram.RAM3.INIT_1B=256'h1a085b5d_38758288_567581be_70810651_7c2c8132_9c5a5c82_800b80f1_04f43d0d;
+defparam bootram.RAM3.INIT_1C=256'h06708a32_800881ff_2e80c538_3f8008ff_7b51e1e1_1a88055b_80d63878_7981ff26;
+defparam bootram.RAM3.INIT_1D=256'h7b708105_38815d77_76802e83_59515858_25075351_80257180_32703072_7030728d;
+defparam bootram.RAM3.INIT_1E=256'h82881908_27ffb138_5a81ff7a_1a0c811a_800b828c_82881a0c_19088105_5d348288;
+defparam bootram.RAM3.INIT_1F=256'h802eab38_78225675_7627bf38_1b0c568b_8111828c_828c1908_387c9138_802e80d2;
+defparam bootram.RAM3.INIT_20=256'h7826ef38_81185888_75337734_781a5757_5b58771a_800b833d_55881954_82881908;
+defparam bootram.RAM3.INIT_21=256'h5c837c27_82901a5a_1a0c811c_800b828c_82881a0c_a83f800b_7c0551f2_80f19822;
+defparam bootram.RAM3.INIT_22=256'h53845281_759fff06_85559054_80faac23_05225675_3d0d029e_3d0d04fb_fea9388e;
+defparam bootram.RAM3.INIT_23=256'h51515372_2a708106_80087081_3d0d81b0_800c04fa_80faac22_873d0d04_51eb853f;
+defparam bootram.RAM3.INIT_24=256'ha43880ee_9abe2681_1453728c_e7a0a39f_81b0800c_0854810b_3881b084_802e81bd;
+defparam bootram.RAM3.INIT_25=256'h58515380_80713152_0c98e5ea_7080eee0_0570832c_31741184_80eee008_e0088829;
+defparam bootram.RAM3.INIT_26=256'h902b7090_f9dc2270_b1f05380_258538ff_72ffb1f0_90538c39_873880ce_ce907325;
+defparam bootram.RAM3.INIT_27=256'h2270902b_2980f9e0_70902c73_2270902b_0c80f9de_7080f9f0_f9f00816_2c752980;
+defparam bootram.RAM3.INIT_28=256'h56515654_5351555b_2c525755_18057087_f9ec0c73_2c297f80_7f317190_80f9ec08;
+defparam bootram.RAM3.INIT_29=256'h5253fe87_83ffff06_90801370_38f08153_f0812584_538a3972_86388fff_8fff7325;
+defparam bootram.RAM3.INIT_2A=256'h80c07370_dc705454_e33f80f9_528151e3_fa3fb8ef_908051fd_04fd3d0d_3f883d0d;
+defparam bootram.RAM3.INIT_2B=256'h81b0800c_150c810b_0c800b94_800b9015_2398e5ea_800b8415_90732382_82055523;
+defparam bootram.RAM3.INIT_2C=256'h74177033_9d055755_80028405_5199e83f_80c05268_3d705457_ea3d0d88_853d0d04;
+defparam bootram.RAM3.INIT_2D=256'h81068538_81992e09_33515473_38741670_09810694_7381aa2e_ff2e9d38_51547381;
+defparam bootram.RAM3.INIT_2E=256'h54845279_863d7054_04f93d0d_0c983d0d_80547380_7527d138_811555be_81548b39;
+defparam bootram.RAM3.INIT_2F=256'h74800c89_83388155_2e098106_3f800875_73519ef8_80e6e052_80558453_5199983f;
+defparam bootram.RAM3.INIT_30=256'h81ff0670_ed3f8008_dbc13f8e_80e6e451_0d92d63f_0c04fc3d_0b81e094_3d0d0481;
+defparam bootram.RAM3.INIT_31=256'h883880e7_51515473_2a708106_b408708d_e33f81b8_3f80518d_5255e5aa_5380e784;
+defparam bootram.RAM3.INIT_32=256'h80e7fc51_802e9c38_af3f8008_800a51fe_db893f98_80e7d051_3974b738_9c518187;
+defparam bootram.RAM3.INIT_33=256'hce398c80_e8b45180_83f93f80_98800a51_a73f7452_82ac51e0_518da93f_daf53f81;
+defparam bootram.RAM3.INIT_34=256'h0a5197db_ff528c80_805380ff_c63f8380_e8dc51da_2ebd3880_3f800880_0a51fed1;
+defparam bootram.RAM3.INIT_35=256'hd73f8052_82ac51df_51daa03f_3f80e9ac_e73ffed3_82ac51df_51dab03f_3f80e988;
+defparam bootram.RAM3.INIT_36=256'h54a05373_fd3d0d75_f9f40c04_0d047180_8a3f863d_e9e851da_3f883980_805183ab;
+defparam bootram.RAM3.INIT_37=256'h5372802e_80f9f408_51d8ae3f_3f725272_b451e3e2_735280ea_3880c053_87e82e84;
+defparam bootram.RAM3.INIT_38=256'h80f9f408_51d88a3f_80c05280_51d8923f_0da05280_0d04fe3d_722d853d_85387351;
+defparam bootram.RAM3.INIT_39=256'h70810651_8008862a_ac3fff0b_0d9a518d_0d04fc3d_722d843d_85388051_5372802e;
+defparam bootram.RAM3.INIT_3A=256'h71828024_802e9b38_e4547182_06535580_80088680_ec38820b_71802e80_53548155;
+defparam bootram.RAM3.INIT_3B=256'h08528551_8ce73f80_ff548451_802e8338_e8547184_388a3987_71802e8e_8a388a54;
+defparam bootram.RAM3.INIT_3C=256'heaec5553_fa800c80_11337080_0780ebac_70830672_80088a2c_882a8c06_8cdf3f71;
+defparam bootram.RAM3.INIT_3D=256'h387480f9_f8082e98_3f7480f9_5252d8a3_eee41108_2b8c0680_8a3f7182_515452d8;
+defparam bootram.RAM3.INIT_3E=256'h7380f9fc_81069638_74822e09_b93f9e39_06a338fe_812e0981_2ea63874_f80c7482;
+defparam bootram.RAM3.INIT_3F=256'h0dd4ca3f_0d04fd3d_ec3f863d_3f99518b_7351fde8_0cfe9f3f_7380f9fc_082e8e38;
+defparam bootram.RAM4.INIT_00=256'hf53f81ae_5298518b_8bcb3f8d_fc0c9951_ff0b80f9_80f9f80c_c13f800b_8008518b;
+defparam bootram.RAM4.INIT_01=256'h70535484_07f49f06_80089080_518bae3f_de8a3f84_ae528451_8bec3fbe_80529c51;
+defparam bootram.RAM4.INIT_02=256'h518b823f_e0f83f80_80eb8451_08537352_2e8d3880_3f738008_84518b99_518bcf3f;
+defparam bootram.RAM4.INIT_03=256'h0a0681d0_0a077ed0_0a0681d0_3d0d7cd0_3d0d04f6_8ba83f85_07528051_80088480;
+defparam bootram.RAM4.INIT_04=256'h81ab9977_51dbf93f_71770c8a_51dc813f_710c578a_82c08072_83ffff52_0a075956;
+defparam bootram.RAM4.INIT_05=256'h51dbd53f_86770c78_805a8199_e33f80e1_0c7851db_82d4e677_ef3f8a59_0c8a51db;
+defparam bootram.RAM4.INIT_06=256'h71730707_812a8806_2a840672_2a077183_82067187_0670852a_067081ff_7583ffff;
+defparam bootram.RAM4.INIT_07=256'h70818006_872b6306_80c00677_0676852b_077081ff_06717307_74832ba0_73109006;
+defparam bootram.RAM4.INIT_08=256'h07077310_88067173_0672812a_71832a84_71872a07_852a8206_7a882a70_73730707;
+defparam bootram.RAM4.INIT_09=256'h80067373_6d067081_0677872b_852b80c0_81ff0676_73070770_2ba00671_90067483;
+defparam bootram.RAM4.INIT_0A=256'h58525351_5a555b51_53515752_586b4452_6d0c5151_83ffff06_2b7b0770_07077088;
+defparam bootram.RAM4.INIT_0B=256'h7081ff06_0676902a_902a9680_daa23f75_770c7851_3f819981_5653daac_5752575d;
+defparam bootram.RAM4.INIT_0C=256'h07077310_88067173_0672812a_71832a84_71872a07_852a8206_81ff0670_70730770;
+defparam bootram.RAM4.INIT_0D=256'h7081ff06_78872b07_06707207_852b80c0_81ff0676_73070770_2ba00671_90067483;
+defparam bootram.RAM4.INIT_0E=256'h680c5156_80067407_882b83fe_872b0770_06710772_852b80c0_10900671_7a882a70;
+defparam bootram.RAM4.INIT_0F=256'h0c7851d9_81998577_81a18056_52d9a13f_57515157_58525a5a_51555351_67405b51;
+defparam bootram.RAM4.INIT_10=256'h88067173_0672812a_71832a84_71872a07_852a8206_81ff0670_ffff0670_933f7783;
+defparam bootram.RAM4.INIT_11=256'h7f067081_0677872b_852b80c0_81ff0676_73070770_2ba00671_90067483_07077310;
+defparam bootram.RAM4.INIT_12=256'h71730707_812a8806_2a840672_2a077183_82067187_2a70852a_07077a88_80067373;
+defparam bootram.RAM4.INIT_13=256'h70818006_872b6906_80c00677_0676852b_077081ff_06717307_74832ba0_73109006;
+defparam bootram.RAM4.INIT_14=256'h5b515852_57525a55_44525351_5151586b_ff066d0c_077083ff_70882b7b_73730707;
+defparam bootram.RAM4.INIT_15=256'h96800678_3f77902a_7851d7dc_9983770c_c1805581_d7ea3f81_575c5653_53515752;
+defparam bootram.RAM4.INIT_16=256'h812a8806_2a840672_2a077183_82067187_0670852a_077081ff_ff067073_902a7081;
+defparam bootram.RAM4.INIT_17=256'h872b6106_80c00677_0676852b_077081ff_06717307_74832ba0_73109006_71730707;
+defparam bootram.RAM4.INIT_18=256'h07077088_66067173_0672872b_852b80c0_10900671_7a882a70_73730707_70818006;
+defparam bootram.RAM4.INIT_19=256'h515952d6_5a5b5751_53515852_5b515852_69425a54_6a0c5152_83ffff06_2b750770;
+defparam bootram.RAM4.INIT_1A=256'h3f80f077_7851d6b8_3f71770c_7851d6c0_3f80770c_5252d6c8_70780c79_d33f9985;
+defparam bootram.RAM4.INIT_1B=256'h7851d694_3f71770c_7851d69c_3f71770c_5252d6a4_70780c79_af3f8880_0c7851d6;
+defparam bootram.RAM4.INIT_1C=256'h839a3f86_5280d051_fc055380_8254873d_04fb3d0d_3f8c3d0d_7851d68c_3f71770c;
+defparam bootram.RAM4.INIT_1D=256'h93269038_59577782_84120858_80d73d08_80d53d08_ffb23d0d_873d0d04_3d22800c;
+defparam bootram.RAM4.INIT_1E=256'h80ec8805_38758429_962681a2_9f165675_81ac39ff_51da873f_5280ebbc_77538294;
+defparam bootram.RAM4.INIT_1F=256'h5f80c65c_f73f8008_80085e8c_398cf33f_085e818c_c03f8008_80c15ccd_56750804;
+defparam bootram.RAM4.INIT_20=256'hfab0518a_17085280_1708538c_80ea3990_5e80d65c_83ffff06_883f8008_80fa39ff;
+defparam bootram.RAM4.INIT_21=256'h5cbe3980_863880c4_5675802e_0881ff06_8ae53f80_80fab051_5c80d539_a03f80c5;
+defparam bootram.RAM4.INIT_22=256'h05539017_d03dfe80_5ca63980_873f80d7_17085189_1708528c_94175390_c25cb939;
+defparam bootram.RAM4.INIT_23=256'h82945580_8339a05c_51f7f83f_5c805280_8f3980d3_3f80d25c_08518c93_08528c17;
+defparam bootram.RAM4.INIT_24=256'h887826ec_34811858_57753377_3d790557_771980d2_833d5a58_0554800b_d03dfdec;
+defparam bootram.RAM4.INIT_25=256'hf83d0d7a_5183873f_cdf93fff_80ece451_04803d0d_80d03d0d_51e1aa3f_38838082;
+defparam bootram.RAM4.INIT_26=256'h81055833_3d347670_5754738a_38758117_807425b7_ff165654_57575874_7c7f7f5a;
+defparam bootram.RAM4.INIT_27=256'h51d3953f_ff06548a_3f800881_0651d1a9_527781ff_8a3dfc05_05348253_028405a1;
+defparam bootram.RAM4.INIT_28=256'h8338dc56_80de5674_a3053355_fa3d0d02_8a3d0d04_5473800c_38c13981_73802e85;
+defparam bootram.RAM4.INIT_29=256'h5702ab05_f93d0d7c_883d0d04_51ff893f_f75280d0_fc055381_8154883d_75883d34;
+defparam bootram.RAM4.INIT_2A=256'h5473802e_ff067056_3f800881_5256d0c9_a7053370_fc055202_8153893d_33893d34;
+defparam bootram.RAM4.INIT_2B=256'h38815574_73802e83_06705654_800881ff_51cecb3f_537b5275_25973876_9e388077;
+defparam bootram.RAM4.INIT_2C=256'hff065574_3f800881_d051ffa0_81f75280_3dfc0553_0d815488_0d04fa3d_800c893d;
+defparam bootram.RAM4.INIT_2D=256'h56755574_06833881_de2e0981_56567480_0b883d33_3f953980_f051ccaf_8a3880ec;
+defparam bootram.RAM4.INIT_2E=256'h81c0b00c_0c89b00b_0b81c0ac_c0800ca6_80eb0b81_81c0940c_0d04990b_800c883d;
+defparam bootram.RAM4.INIT_2F=256'h70812a70_81c0a408_81c0a00c_0c51820b_0781c098_80067081_72882bbe_04803d0d;
+defparam bootram.RAM4.INIT_30=256'h810781c0_be800670_0d72882b_0d04803d_800c823d_81c0a808_5170f138_81065151;
+defparam bootram.RAM4.INIT_31=256'hf138823d_51515170_2a708106_a4087081_a00c81c0_840b81c0_81c09c0c_980c5173;
+defparam bootram.RAM4.INIT_32=256'h83065271_718a3872_75830652_57719138_06555557_7a7c7283_fa3d0d78_0d04ff39;
+defparam bootram.RAM4.INIT_33=256'h08720c52_11771270_73822b77_75279438_72555573_3f72822a_815189b2_802e8638;
+defparam bootram.RAM4.INIT_34=256'h5353c9c3_11335451_0680ed90_842a708f_3d0d7470_3d0d04fe_54e93988_54528114;
+defparam bootram.RAM4.INIT_35=256'h0870882a_5382e090_0d8386d0_0d04fe3d_b63f843d_335253c9_80ed9011_3f728f06;
+defparam bootram.RAM4.INIT_36=256'hfc3d0d02_843d0d04_51ca803f_3880eda0_135372e9_2e8e38ff_51527180_70810651;
+defparam bootram.RAM4.INIT_37=256'h2a708106_90087088_d05382e0_55558386_80c08007_8c800607_80ff067c_9b05337a;
+defparam bootram.RAM4.INIT_38=256'he0900c77_800c7382_3f7882e0_a051c9c3_e93880ed_ff135372_802e8e38_51515271;
+defparam bootram.RAM4.INIT_39=256'h90087088_d05382e0_a9388386_5274802e_e0900c74_82800782_e0980c73_81ff0682;
+defparam bootram.RAM4.INIT_3A=256'h08527180_3f82e080_a051c8ff_e93880ed_ff135372_802e8e38_51515271_2a708106;
+defparam bootram.RAM4.INIT_3B=256'h863d0d04_51fee13f_53805280_55885480_940c8880_810b82e0_04fc3d0d_0c863d0d;
+defparam bootram.RAM4.INIT_3C=256'h04fc3d0d_0c863d0d_81ff0680_cb3f8008_528151fe_8a805381_80559054_fc3d0d88;
+defparam bootram.RAM4.INIT_3D=256'h06800c82_08813281_0dca3f80_0d04803d_af3f863d_528051fe_54865381_88805588;
+defparam bootram.RAM4.INIT_3E=256'h85923f75_3d0d7756_3d0d04fb_2ef43882_06517080_800881ff_3d0deb3f_3d0d0480;
+defparam bootram.RAM4.INIT_3F=256'hfdde3f87_81528051_9b0a0753_fe9b0a06_55a05475_b43f8880_38dd3fff_8008269b;
+defparam bootram.RAM5.INIT_00=256'h38751754_ff2681b4_80557381_11565757_cb3d08ff_c93d0880_ba3d0d80_3d0d04ff;
+defparam bootram.RAM5.INIT_01=256'h3d085273_755380cb_548cbe3f_883d7052_5381ff52_a7388280_80082681_84ce3f73;
+defparam bootram.RAM5.INIT_02=256'h0a0680c0_0c76fec0_0b82e090_980c8880_3f7482e0_d43ffce6_fefd3ffe_518b993f;
+defparam bootram.RAM5.INIT_03=256'h3f80c83d_900cfcb6_a00b82e0_e0900c8a_88a00b82_82e0980c_800c810b_0a0782e0;
+defparam bootram.RAM5.INIT_04=256'h82e0840c_88157008_880c54fe_700882e0_54fe8415_82e08c0c_80157008_558f56fe;
+defparam bootram.RAM5.INIT_05=256'hff169016_0cfbf73f_0b82e090_900c8a80_800b82e0_800c5488_700882e0_54fe8c15;
+defparam bootram.RAM5.INIT_06=256'h7b7d7212_f93d0d79_c83d0d04_74800c80_980c8155_800b82e0_25ffbc38_56567580;
+defparam bootram.RAM5.INIT_07=256'h5473802e_7581ff06_2e80c338_81577480_2680cb38_57738008_838a3f80_575a5656;
+defparam bootram.RAM5.INIT_08=256'h19767631_3f731674_7551fdeb_77537352_83387654_57767527_74317555_a2388280;
+defparam bootram.RAM5.INIT_09=256'h0c893d0d_81577680_39fd8c3f_828054dc_7527e138_74548280_802e8e38_57595674;
+defparam bootram.RAM5.INIT_0A=256'h0b88160c_27903880_3f800874_1354829c_2e8d3873_54557380_76787a56_04fc3d0d;
+defparam bootram.RAM5.INIT_0B=256'h08307276_81ec3f80_16565152_707406ff_3f800830_a63981fa_0c80750c_800b8416;
+defparam bootram.RAM5.INIT_0C=256'h0881ff06_fc983f80_3d0d7554_3d0d04fd_fcc93f86_160c7151_160c7188_0c740684;
+defparam bootram.RAM5.INIT_0D=256'h7088160c_08800805_b13f8814_2e943881_08841508_81538814_802e9f38_70545271;
+defparam bootram.RAM5.INIT_0E=256'h51f9fd3f_53815281_5481f90a_888055a0_04fc3d0d_0c853d0d_80537280_51fc943f;
+defparam bootram.RAM5.INIT_0F=256'h882a7081_d43f8008_7480c238_fa840855_fb3d0d80_863d0d04_0a06800c_8008fe80;
+defparam bootram.RAM5.INIT_10=256'h7380c02e_83388155_3f73a02e_5154cdbe_edbc5458_56715580_81ff0670_ff068008;
+defparam bootram.RAM5.INIT_11=256'h08ea1155_0c80fa84_7580fa84_fe3f9c39_edd451c2_2e8a3880_06547380_93387481;
+defparam bootram.RAM5.INIT_12=256'h800880ee_04ff913f_0c873d0d_dc3f7480_cd843ff4_80edf451_8d387452_55827427;
+defparam bootram.RAM5.INIT_13=256'h3d0d7d56_800c04f6_0b80082b_fefa3f81_2b800c04_810b8008_0c04f23f_de053380;
+defparam bootram.RAM5.INIT_14=256'h0c810b82_2b82e080_840c7c88_8b0b82e0_82e0900c_0c88800b_0b82e098_f8b03f80;
+defparam bootram.RAM5.INIT_15=256'hd3388880_73762780_7e558054_0cf7ff3f_0b82e090_900c8aa8_a80b82e0_e0980c88;
+defparam bootram.RAM5.INIT_16=256'h085a82e0_5982e084_82e08808_e08c0858_f7e43f82_82e0900c_0c8a800b_0b82e090;
+defparam bootram.RAM5.INIT_17=256'h51703375_91387117_52717327_38705380_70732783_52579053_3d767531_80085b88;
+defparam bootram.RAM5.INIT_18=256'h0d7251f6_0d04803d_980c8c3d_800b82e0_54ffa939_ec397214_34811252_70810557;
+defparam bootram.RAM5.INIT_19=256'h0870800c_82de3f80_88050851_08528c08_8c088c05_3d0d8053_028c0cfd_a13f8c08;
+defparam bootram.RAM5.INIT_1A=256'h5182b93f_08880508_0508528c_538c088c_fd3d0d81_08028c0c_8c0c048c_54853d0d;
+defparam bootram.RAM5.INIT_1B=256'h08880508_fc050c8c_800b8c08_0cf93d0d_8c08028c_0d8c0c04_0c54853d_80087080;
+defparam bootram.RAM5.INIT_1C=256'h38810b8c_fc050888_050c8c08_0b8c08f4_88050c80_08308c08_8c088805_8025ab38;
+defparam bootram.RAM5.INIT_1D=256'h308c088c_088c0508_25ab388c_8c050880_050c8c08_088c08fc_8c08f405_08f4050c;
+defparam bootram.RAM5.INIT_1E=256'h8c08fc05_08f00508_f0050c8c_810b8c08_05088838_0c8c08fc_8c08f005_050c800b;
+defparam bootram.RAM5.INIT_1F=256'h08fc0508_050c548c_708c08f8_a73f8008_05085181_528c0888_088c0508_0c80538c;
+defparam bootram.RAM5.INIT_20=256'h0c048c08_893d0d8c_70800c54_08f80508_f8050c8c_08308c08_8c08f805_802e8c38;
+defparam bootram.RAM5.INIT_21=256'h8c088805_88050830_93388c08_05088025_0c8c0888_8c08fc05_3d0d800b_028c0cfb;
+defparam bootram.RAM5.INIT_22=256'h81538c08_088c050c_0508308c_388c088c_0880258c_8c088c05_08fc050c_0c810b8c;
+defparam bootram.RAM5.INIT_23=256'h8c388c08_0508802e_548c08fc_08f8050c_8008708c_0851ad3f_8c088805_8c050852;
+defparam bootram.RAM5.INIT_24=256'h0cfd3d0d_8c08028c_0d8c0c04_0c54873d_05087080_0c8c08f8_8c08f805_f8050830;
+defparam bootram.RAM5.INIT_25=256'h08fc0508_27ac388c_08880508_8c05088c_050c8c08_0b8c08f8_fc050c80_810b8c08;
+defparam bootram.RAM5.INIT_26=256'h0508108c_0c8c08fc_8c088c05_8c050810_99388c08_8c050824_800b8c08_802ea338;
+defparam bootram.RAM5.INIT_27=256'h388c0888_050826a1_088c0888_8c088c05_2e80c938_fc050880_c9398c08_08fc050c;
+defparam bootram.RAM5.INIT_28=256'h0c8c08fc_8c08f805_fc050807_05088c08_0c8c08f8_8c088805_8c050831_05088c08;
+defparam bootram.RAM5.INIT_29=256'h08802e8f_8c089005_0cffaf39_8c088c05_0508812a_0c8c088c_8c08fc05_0508812a;
+defparam bootram.RAM5.INIT_2A=256'h08f40508_050c518c_708c08f4_08f80508_518d398c_08f4050c_0508708c_388c0888;
+defparam bootram.RAM5.INIT_2B=256'h70802eb0_07830651_8c387474_52837227_77795656_fc3d0d78_0d8c0c04_800c853d;
+defparam bootram.RAM5.INIT_2C=256'h14545555_158115ff_06bd3881_712e0981_33525372_38743374_71ff2ea0_38ff1252;
+defparam bootram.RAM5.INIT_2D=256'h8f388411_2e098106_70087308_74745451_863d0d04_800b800c_8106e238_71ff2e09;
+defparam bootram.RAM5.INIT_2E=256'hfc3d0d76_863d0d04_7131800c_ffaf3972_70735555_8326e938_54545171_8414fc14;
+defparam bootram.RAM5.INIT_2F=256'h2e983872_125271ff_2ea738ff_06517080_72750783_72278c38_5555558f_70797b55;
+defparam bootram.RAM5.INIT_30=256'h04745172_0c863d0d_ea387480_2e098106_125271ff_055634ff_33747081_70810554;
+defparam bootram.RAM5.INIT_31=256'h08717084_70840554_05530c72_08717084_70840554_05530c72_08717084_70840554;
+defparam bootram.RAM5.INIT_32=256'h72708405_72279538_26c93883_1252718f_05530cf0_08717084_70840554_05530c72;
+defparam bootram.RAM5.INIT_33=256'h8c059f05_76797102_39fc3d0d_7054ff83_8326ed38_fc125271_8405530c_54087170;
+defparam bootram.RAM5.INIT_34=256'h73708105_2e933873_125271ff_2ea238ff_06517080_8a387483_55837227_33575553;
+defparam bootram.RAM5.INIT_35=256'h902b0751_75077071_7474882b_863d0d04_3874800c_098106ef_5271ff2e_5534ff12;
+defparam bootram.RAM5.INIT_36=256'h72717084_8405530c_0c727170_70840553_530c7271_71708405_27a53872_54518f72;
+defparam bootram.RAM5.INIT_37=256'h26f23870_12527183_05530cfc_72717084_72279038_26dd3883_1252718f_05530cf0;
+defparam bootram.RAM5.INIT_38=256'h802e80d4_83065170_38717407_802e80d9_55555272_7a7c7054_fa3d0d78_53ff9039;
+defparam bootram.RAM5.INIT_39=256'h387081ff_802e8187_06a93872_712e0981_33565174_38713374_72ff2eb1_38ff1353;
+defparam bootram.RAM5.INIT_3A=256'h33565170_38713374_098106d1_5272ff2e_ff155555_81128115_2e80fc38_06517080;
+defparam bootram.RAM5.INIT_3B=256'h38710874_83732788_71745755_883d0d04_5270800c_71315152_81ff0671_81ff0675;
+defparam bootram.RAM5.INIT_3C=256'h0670f884_fbfdff12_087009f7_2eb13874_13537280_ff9739fc_74765552_082e8838;
+defparam bootram.RAM5.INIT_3D=256'h74765552_082ed038_38740876_837327d0_84175755_9a388415_51515170_82818006;
+defparam bootram.RAM5.INIT_3E=256'h80fa880c_2e9e3873_54547281_80eeb408_3d0d800b_3d0d04fd_0b800c88_fedf3980;
+defparam bootram.RAM5.INIT_3F=256'h0cffa8e0_7280fa88_51f6a33f_893f8008_8151ffb0_80eef852_ffa8993f_ffa8fd3f;
+defparam bootram.RAM6.INIT_00=256'hef800bfc_ff3d0d80_3f00ff39_0851f686_afec3f80_528151ff_3f80eef8_3fffa7fc;
+defparam bootram.RAM6.INIT_01=256'h0d0404ff_f138833d_2e098106_525270ff_fc127008_9138702d_5270ff2e_05700852;
+defparam bootram.RAM6.INIT_02=256'h636b6574_6c207061_6e74726f_6e20636f_6f722069_21457272_00000040_a98b3f04;
+defparam bootram.RAM6.INIT_03=256'h6c697479_74696269_6f6d7061_65642063_70656374_3a204578_646c6572_2068616e;
+defparam bootram.RAM6.INIT_04=256'h6f722069_21457272_25640a00_676f7420_62757420_25642c20_62657220_206e756d;
+defparam bootram.RAM6.INIT_05=256'h70656374_3a204578_646c6572_2068616e_636b6574_6c207061_6e74726f_6e20636f;
+defparam bootram.RAM6.INIT_06=256'h74202564_7420676f_2c206275_68202564_656e6774_6164206c_61796c6f_65642070;
+defparam bootram.RAM6.INIT_07=256'h203d2025_70656564_643a2073_616e6765_6b206368_206c696e_0a657468_0a000000;
+defparam bootram.RAM6.INIT_08=256'h720a0000_6f616465_6f6f746c_44502062_31302055_50204e32_0a555352_640a0000;
+defparam bootram.RAM6.INIT_09=256'h640a0000_723a2025_756d6265_7479206e_62696c69_70617469_20636f6d_46504741;
+defparam bootram.RAM6.INIT_0A=256'h723a2025_756d6265_7479206e_62696c69_70617469_20636f6d_77617265_4669726d;
+defparam bootram.RAM6.INIT_0B=256'h7061636b_65727920_65636f76_69702072_476f7420_00000000_61646472_640a0000;
+defparam bootram.RAM6.INIT_0C=256'h0000078f_00000765_0000078f_0000078f_000006df_000006f6_00000000_65743a20;
+defparam bootram.RAM6.INIT_0D=256'h0000066d_0000078f_000006a7_00000713_0000078f_0000078f_0000078f_0000078f;
+defparam bootram.RAM6.INIT_0E=256'h00000738_00000733_0000072e_0000067a_0000078f_0000078f_0000078f_0000078f;
+defparam bootram.RAM6.INIT_0F=256'h6e203d20_7273696f_70207665_20636869_4c4d5331_00000753_00000746_0000073f;
+defparam bootram.RAM6.INIT_10=256'h30782578_6e203d20_7273696f_70207665_20636869_4c4d5332_0a000000_30782578;
+defparam bootram.RAM6.INIT_11=256'h6932635f_01c300e2_054a0387_15290a94_3fff0000_0050c285_c0a80a02_0a000000;
+defparam bootram.RAM6.INIT_12=256'h5f666f72_77616974_21000000_696c6564_47206661_4348444f_20574154_72656164;
+defparam bootram.RAM6.INIT_13=256'h77726974_6932635f_64210000_61696c65_4f472066_54434844_72205741_5f786665;
+defparam bootram.RAM6.INIT_14=256'h642e2564_25642e25_45000000_64210000_61696c65_4f472066_54434844_65205741;
+defparam bootram.RAM6.INIT_15=256'hffff0000_ffffffff_00000000_43444546_38394142_34353637_30313233_2e256400;
+defparam bootram.RAM6.INIT_16=256'h656e2061_6f66206c_656e7420_69676e6d_6420616c_3a206261_5f706b74_73656e64;
+defparam bootram.RAM6.INIT_17=256'h65642074_6661696c_6f6e3a20_636f6d6d_6e65745f_66000000_72206275_6e642f6f;
+defparam bootram.RAM6.INIT_18=256'h0a68616e_00000000_666f7220_696e6720_6c6f6f6b_63686520_74206361_6f206869;
+defparam bootram.RAM6.INIT_19=256'h55445020_0a000000_3d202564_697a6520_72642073_20776569_6172703a_646c655f;
+defparam bootram.RAM6.INIT_1A=256'h00000000_2025640a_3a202564_67746873_206c656e_74656e74_6e736973_696e636f;
+defparam bootram.RAM6.INIT_1B=256'h616c697a_6e697469_656e2069_73206265_68206861_466c6173_53504920_0b0b0b0b;
+defparam bootram.RAM6.INIT_1C=256'h53746172_640a0000_203d2025_6d616765_6f6e2069_75637469_50726f64_65640000;
+defparam bootram.RAM6.INIT_1D=256'h64696e67_204c6f61_6f64652e_6665206d_6e207361_52582069_20556d54_74696e67;
+defparam bootram.RAM6.INIT_1E=256'h2076616c_20666f72_6b696e67_43686563_72652e00_726d7761_65206669_20736166;
+defparam bootram.RAM6.INIT_1F=256'h56616c69_2e2e2e00_6d616765_47412069_6e204650_6374696f_726f6475_69642070;
+defparam bootram.RAM6.INIT_20=256'h642e2041_666f756e_61676520_4120696d_20465047_74696f6e_6f647563_64207072;
+defparam bootram.RAM6.INIT_21=256'h2070726f_616c6964_4e6f2076_742e0000_20626f6f_6720746f_7074696e_7474656d;
+defparam bootram.RAM6.INIT_22=256'h56616c69_2e0a0000_6f756e64_67652066_20696d61_46504741_696f6e20_64756374;
+defparam bootram.RAM6.INIT_23=256'h204c6f61_756e642e_6520666f_6d776172_20666972_74696f6e_6f647563_64207072;
+defparam bootram.RAM6.INIT_24=256'h61727469_2e205374_64696e67_206c6f61_73686564_46696e69_2e2e2e00_64696e67;
+defparam bootram.RAM6.INIT_25=256'h6f6d206d_6e206672_65747572_523a2052_4552524f_2e000000_6d616765_6e672069;
+defparam bootram.RAM6.INIT_26=256'h65722068_206e6576_6f756c64_73207368_20546869_72616d21_70726f67_61696e20;
+defparam bootram.RAM6.INIT_27=256'h6669726d_696f6e20_64756374_2070726f_616c6964_4e6f2076_6e210000_61707065;
+defparam bootram.RAM6.INIT_28=256'h746f2062_75676820_7468726f_696e6720_46616c6c_6e642e20_20666f75_77617265;
+defparam bootram.RAM6.INIT_29=256'h7420746f_64207365_53706565_2e000000_77617265_6669726d_2d696e20_75696c74;
+defparam bootram.RAM6.INIT_2A=256'h58000000_57455f52_58000000_57455f54_00000000_4e4f4e45_00000000_2025640a;
+defparam bootram.RAM6.INIT_2B=256'h6e74726f_7720636f_20666c6f_726e6574_65746865_43000000_45545249_53594d4d;
+defparam bootram.RAM6.INIT_2C=256'h7825782c_74652030_2077726f_4144563a_4e45475f_4155544f_5048595f_6c3a2000;
+defparam bootram.RAM6.INIT_2D=256'h21457272_00030203_00000001_00030003_00000000_780a0000_20307825_20676f74;
+defparam bootram.RAM6.INIT_2E=256'h20457870_6c65723a_68616e64_6b657420_20706163_64617465_6e207570_6f722069;
+defparam bootram.RAM6.INIT_2F=256'h20676f74_20627574_2025642c_6e677468_64206c65_796c6f61_64207061_65637465;
+defparam bootram.RAM6.INIT_30=256'h000023f1_00002413_00002428_0000247a_0000247a_000023e4_00000000_2025640a;
+defparam bootram.RAM6.INIT_31=256'h0000247a_0000247a_0000247a_0000247a_0000247a_0000247a_0000247a_0000247a;
+defparam bootram.RAM6.INIT_32=256'h00002403_0000247a_0000247a_0000246e_00002457_0000247a_0000247a_0000247a;
+defparam bootram.RAM6.INIT_33=256'h61642073_6f207265_65642074_4661696c_00000000_6f72740a_0a0a6162_00002444;
+defparam bootram.RAM6.INIT_34=256'h43444546_38394142_34353637_30313233_67000000_20666c61_626f6f74_61666520;
+defparam bootram.RAM6.INIT_35=256'h0a666c61_64210000_61696c65_4f472066_54434844_74205741_5f776169_73706966;
+defparam bootram.RAM6.INIT_36=256'h6c617368_6e672066_0a57726f_25640a00_697a653d_25642073_7970653d_73682074;
+defparam bootram.RAM6.INIT_37=256'h6c617368_6e672066_0a57726f_00000000_6e67210a_63687475_652e2041_20747970;
+defparam bootram.RAM6.INIT_38=256'h65000000_792e6578_64756d6d_67210a00_6874756e_64204163_653a2025_2073697a;
+defparam bootram.RAM6.INIT_39=256'h00003788_00000000_00000000_00000000_ffffff00_ffff00ff_ff00ffff_00ffffff;
+defparam bootram.RAM6.INIT_3A=256'h000c0000_00190010_ffff0033_04000400_01010100_3fff0000_0050c285_c0a80a02;
+defparam bootram.RAM6.INIT_3B=256'hffffffff_00003714_10101200_00003560_00003558_00003550_00003548_03197500;
+defparam bootram.RAM6.INIT_3C=256'h00000000_00000000_00000000_00000000_00000000_00000000_ffffffff_00000000;
 defparam bootram.RAM6.INIT_3D=256'h00000000_00000000_00000000_00000000_00000000_00000000_00000000_00000000;
 defparam bootram.RAM6.INIT_3E=256'h00000000_00000000_00000000_00000000_00000000_00000000_00000000_00000000;
 defparam bootram.RAM6.INIT_3F=256'h00000000_00000000_00000000_00000000_00000000_00000000_00000000_00000000;
--- a/fpga/top/UmTRX/umtrx_core.v
+++ b/fpga/top/UmTRX/umtrx_core.v
@@ -448,7 +448,7 @@ module umtrx_core
   // Buffer Pool Status -- Slave #5   
   
   //compatibility number -> increment when the fpga has been sufficiently altered
-   localparam compat_num = {16'd9, 16'd0}; //major, minor
+   localparam compat_num = {16'd9, 16'd2}; //major, minor

   wire [31:0] irq_readback = {16'b0, aux_ld2, aux_ld1, button, spi_ready, 12'b0};

@@ -672,20 +672,20 @@ module umtrx_core

   // /////////////////////////////////////////////////////////////////////////
   // RX Frontend
-    wire [23:0] front0_i, front0_q;
+    wire [23:0] rx_front0_i, rx_front0_q;
    rx_frontend #(.BASE(SR_RX_FRONT0)) rx_frontend0
    (
        .clk(fe_clk), .rst(fe_rst),
        .set_stb(set_stb_fe),.set_addr(set_addr_fe),.set_data(set_data_fe),
-        .i_out(front0_i), .q_out(front0_q), .run(1'b1),
+        .i_out(rx_front0_i), .q_out(rx_front0_q), .run(1'b1),
        .adc_a({adc0_a, 4'b0}), .adc_b({adc0_b, 4'b0})
    );
-    wire [23:0] front1_i, front1_q;
+    wire [23:0] rx_front1_i, rx_front1_q;
    rx_frontend #(.BASE(SR_RX_FRONT1)) rx_frontend1
    (
        .clk(fe_clk), .rst(fe_rst),
        .set_stb(set_stb_fe),.set_addr(set_addr_fe),.set_data(set_data_fe),
-        .i_out(front1_i), .q_out(front1_q), .run(1'b1),
+        .i_out(rx_front1_i), .q_out(rx_front1_q), .run(1'b1),
        .adc_a({adc1_a, 4'b0}), .adc_b({adc1_b, 4'b0})
    );

@@ -716,8 +716,8 @@ module umtrx_core
        .fe_clk(fe_clk), .fe_rst(fe_rst),
        .set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
        .set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
-        .front_i(rx_fe_sw[0]?front1_i:front0_i),
-        .front_q(rx_fe_sw[0]?front1_q:front0_q),
+        .front_i(rx_fe_sw[0]?rx_front1_i:rx_front0_i),
+        .front_q(rx_fe_sw[0]?rx_front1_q:rx_front0_q),
        .adc_stb(rx_fe_sw[0]?adc1_strobe:adc0_strobe),
        .run(run_rx_dsp[0]),
        .vita_data_sys(dsp_rx0_data), .vita_valid_sys(dsp_rx0_valid), .vita_ready_sys(dsp_rx0_ready),
@@ -743,8 +743,8 @@ module umtrx_core
        .fe_clk(fe_clk), .fe_rst(fe_rst),
        .set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
        .set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
-        .front_i(rx_fe_sw[1]?front1_i:front0_i),
-        .front_q(rx_fe_sw[1]?front1_q:front0_q),
+        .front_i(rx_fe_sw[1]?rx_front1_i:rx_front0_i),
+        .front_q(rx_fe_sw[1]?rx_front1_q:rx_front0_q),
        .adc_stb(rx_fe_sw[1]?adc1_strobe:adc0_strobe),
        .run(run_rx_dsp[1]),
        .vita_data_sys(dsp_rx1_data), .vita_valid_sys(dsp_rx1_valid), .vita_ready_sys(dsp_rx1_ready),
@@ -770,8 +770,8 @@ module umtrx_core
        .fe_clk(fe_clk), .fe_rst(fe_rst),
        .set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
        .set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
-        .front_i(rx_fe_sw[2]?front1_i:front0_i),
-        .front_q(rx_fe_sw[2]?front1_q:front0_q),
+        .front_i(rx_fe_sw[2]?rx_front1_i:rx_front0_i),
+        .front_q(rx_fe_sw[2]?rx_front1_q:rx_front0_q),
        .adc_stb(rx_fe_sw[2]?adc1_strobe:adc0_strobe),
        .run(run_rx_dsp[2]),
        .vita_data_sys(dsp_rx2_data), .vita_valid_sys(dsp_rx2_valid), .vita_ready_sys(dsp_rx2_ready),
@@ -797,8 +797,8 @@ module umtrx_core
        .fe_clk(fe_clk), .fe_rst(fe_rst),
        .set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
        .set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
-        .front_i(rx_fe_sw[3]?front1_i:front0_i),
-        .front_q(rx_fe_sw[3]?front1_q:front0_q),
+        .front_i(rx_fe_sw[3]?rx_front1_i:rx_front0_i),
+        .front_q(rx_fe_sw[3]?rx_front1_q:rx_front0_q),
        .adc_stb(rx_fe_sw[3]?adc1_strobe:adc0_strobe),
        .run(run_rx_dsp[3]),
        .vita_data_sys(dsp_rx3_data), .vita_valid_sys(dsp_rx3_valid), .vita_ready_sys(dsp_rx3_ready),
@@ -810,6 +810,28 @@ module umtrx_core
    end
    endgenerate

+   // /////////////////////////////////////////////////////////////////////////
+   // TX Frontend
+    wire [23:0] tx_front0_i, tx_front0_q;
+    wire [3:0] dac0_a_pad, dac0_b_pad;
+    tx_frontend #(.BASE(SR_TX_FRONT0)) tx_frontend0
+    (
+        .clk(fe_clk), .rst(fe_rst),
+        .set_stb(set_stb_fe),.set_addr(set_addr_fe),.set_data(set_data_fe),
+        .tx_i(tx_front0_i), .tx_q(tx_front0_q), .run(1'b1),
+        .dac_a({dac0_a, dac0_a_pad}), .dac_b({dac0_b, dac0_b_pad})
+    );
+
+    wire [23:0] tx_front1_i, tx_front1_q;
+    wire [3:0] dac1_a_pad, dac1_b_pad;
+    tx_frontend #(.BASE(SR_TX_FRONT1)) tx_frontend1
+    (
+        .clk(fe_clk), .rst(fe_rst),
+        .set_stb(set_stb_fe),.set_addr(set_addr_fe),.set_data(set_data_fe),
+        .tx_i(tx_front1_i), .tx_q(tx_front1_q), .run(1'b1),
+        .dac_a({dac1_a, dac1_a_pad}), .dac_b({dac1_b, dac1_b_pad})
+    );
+
   // /////////////////////////////////////////////////////////////////////////
   // TX chains
    wire [35:0] sram0_data, sram1_data;
@@ -823,10 +845,10 @@ module umtrx_core
     (.clk(dsp_clk),.rst(dsp_rst),.strobe(set_stb_dsp),.addr(set_addr_dsp),.in(set_data_dsp),.out(tx_fe_sw),.changed());

    //assign dac switch
-    wire [11:0] dac0_a_int, dac0_b_int;
-    wire [11:0] dac1_a_int, dac1_b_int;
-    assign {dac0_a, dac0_b} = (tx_fe_sw == 0)? {dac0_a_int, dac0_b_int} : {dac1_a_int, dac1_b_int};
-    assign {dac1_a, dac1_b} = (tx_fe_sw == 1)? {dac0_a_int, dac0_b_int} : {dac1_a_int, dac1_b_int};
+    wire [23:0] dac0_a_int, dac0_b_int;
+    wire [23:0] dac1_a_int, dac1_b_int;
+    assign {tx_front0_i, tx_front0_q} = (tx_fe_sw == 0)? {dac0_a_int, dac0_b_int} : {dac1_a_int, dac1_b_int};
+    assign {tx_front1_i, tx_front1_q} = (tx_fe_sw == 1)? {dac0_a_int, dac0_b_int} : {dac1_a_int, dac1_b_int};

    generate
    if (`NUMDUC > 0) begin
@@ -834,7 +856,6 @@ module umtrx_core
    #(
        .PROT_DEST(0),
        .DSPNO(0),
-        .FRONT_BASE(SR_TX_FRONT0),
        .DSP_BASE(SR_TX_DSP0),
        .CTRL_BASE(SR_TX_CTRL0),
        .FIFOSIZE(DSP_TX_FIFOSIZE)
@@ -846,7 +867,7 @@ module umtrx_core
        .fe_clk(fe_clk), .fe_rst(fe_rst),
        .set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
        .set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
-        .dac_a(dac0_a_int), .dac_b(dac0_b_int), .dac_stb(dac0_strobe), .run(run_tx_dsp0),
+        .front_i(dac0_a_int), .front_q(dac0_b_int), .dac_stb(dac0_strobe), .run(run_tx_dsp0),
        .vita_data_sys(sram0_data), .vita_valid_sys(sram0_valid), .vita_ready_sys(sram0_ready),
        .err_data_sys(err_tx0_data), .err_valid_sys(err_tx0_valid), .err_ready_sys(err_tx0_ready),
        .vita_time(vita_time)
@@ -861,7 +882,6 @@ module umtrx_core
    #(
        .PROT_DEST(1),
        .DSPNO(1),
-        .FRONT_BASE(SR_TX_FRONT1),
        .DSP_BASE(SR_TX_DSP1),
        .CTRL_BASE(SR_TX_CTRL1),
        .FIFOSIZE(DSP_TX_FIFOSIZE)
@@ -873,7 +893,7 @@ module umtrx_core
        .fe_clk(fe_clk), .fe_rst(fe_rst),
        .set_stb_dsp(set_stb_dsp), .set_addr_dsp(set_addr_dsp), .set_data_dsp(set_data_dsp),
        .set_stb_fe(set_stb_fe), .set_addr_fe(set_addr_fe), .set_data_fe(set_data_fe),
-        .dac_a(dac1_a_int), .dac_b(dac1_b_int), .dac_stb(dac1_strobe), .run(run_tx_dsp1),
+        .front_i(dac1_a_int), .front_q(dac1_b_int), .dac_stb(dac1_strobe), .run(run_tx_dsp1),
        .vita_data_sys(sram1_data), .vita_valid_sys(sram1_valid), .vita_ready_sys(sram1_ready),
        .err_data_sys(err_tx1_data), .err_valid_sys(err_tx1_valid), .err_ready_sys(err_tx1_ready),
        .vita_time(vita_time)
--- a/fpga/top/UmTRX/umtrx_tx_chain.v
+++ b/fpga/top/UmTRX/umtrx_tx_chain.v
@@ -6,7 +6,6 @@ module umtrx_tx_chain
 #(
    parameter PROT_DEST = 0, //framer index
    parameter DSPNO = 0, //the dsp unit number: 0, 1, 2...
-    parameter FRONT_BASE = 0,
    parameter DSP_BASE = 0,
    parameter CTRL_BASE = 0,
    parameter FIFOSIZE = 10,
@@ -32,9 +31,9 @@ module umtrx_tx_chain
    input [7:0] set_addr_fe,
    input [31:0] set_data_fe,

-    //dsp clock domain
-    output reg [11:0] dac_a,
-    output reg [11:0] dac_b,
+    //fe clock domain
+    output [23:0] front_i,
+    output [23:0] front_q,
    input dac_stb,
    output run,

@@ -52,28 +51,6 @@ module umtrx_tx_chain
    wire [63:0] vita_time
 );

-    /*******************************************************************
-     * Cross DAC signals from fe to dsp clock domain
-     * dac_a/b come from a register on the fe clock domain
-     ******************************************************************/
-    wire [15:0] dac_a_16, dac_b_16;
-    always @(posedge fe_clk) begin
-        dac_a <= dac_a_16[15:4];
-        dac_b <= dac_b_16[15:4];
-    end
-
-    /*******************************************************************
-     * TX frontend on fe clock domain
-     ******************************************************************/
-    wire [23:0] front_i, front_q;
-    tx_frontend #(.BASE(FRONT_BASE)) tx_frontend
-    (
-        .clk(fe_clk), .rst(fe_rst),
-        .set_stb(set_stb_fe),.set_addr(set_addr_fe),.set_data(set_data_fe),
-        .tx_i(front_i), .tx_q(front_q), .run(1'b1),
-        .dac_a(dac_a_16), .dac_b(dac_b_16)
-    );
-
    /*******************************************************************
     * DUC chain on fe clock domain
     ******************************************************************/
@@ -180,8 +157,6 @@ module umtrx_tx_chain
        assign DATA[63:32] = vita_sample;
        assign DATA[95:64] = duc_sample;
        assign DATA[127:96] = {front_i[23:8], front_q[23:8]};
-        assign DATA[159:128] = {dac_a_16, dac_b_16};
-        assign DATA[191:160] = {dac_a, 4'b0, dac_b, 4'b0};
    end
    endgenerate

--- a/host/CMakeLists.txt
+++ b/host/CMakeLists.txt
@@ -21,13 +21,25 @@
 cmake_minimum_required(VERSION 2.8)
 project(UmTRX-UHD)

-set(UMTRX_VERSION 1.0.0)
+########################################################################
+# extract version info from git
+########################################################################
+include(${PROJECT_SOURCE_DIR}/cmake/GetGitRevisionDescription.cmake)
+git_describe(UMTRX_VERSION --dirty)
+string(REPLACE "g" "" UMTRX_VERSION ${UMTRX_VERSION}) #remove hash prefix g
+message(STATUS "UMTRX_VERSION: ${UMTRX_VERSION}")
+configure_file(
+    "${CMAKE_CURRENT_SOURCE_DIR}/umtrx_version.in.hpp"
+    "${CMAKE_CURRENT_BINARY_DIR}/umtrx_version.hpp"
+    IMMEDIATE @ONLY)
+include_directories(${CMAKE_CURRENT_BINARY_DIR})

 ########################################################################
 ## Create a list of module sources
 ########################################################################
 list(APPEND UMTRX_SOURCES
    umtrx_impl.cpp
+    umtrx_monitor.cpp
    umtrx_io_impl.cpp
    umtrx_find.cpp
    umtrx_iface.cpp
@@ -36,6 +48,7 @@ list(APPEND UMTRX_SOURCES
    lms6002d_ctrl.cpp
    tmp102_ctrl.cpp
    ads1015_ctrl.cpp
+    power_amp.cpp
    umtrx_fifo_ctrl.cpp
    missing/platform.cpp #not properly exported from uhd, so we had to copy it
    cores/rx_frontend_core_200.cpp
--- a/host/ads1015_ctrl.cpp
+++ b/host/ads1015_ctrl.cpp
@@ -20,6 +20,10 @@

 #include <iostream>

+#if defined(_MSC_VER) && (_MSC_VER <= 1700)
+#define nan(arg) std::strtod("NAN()", (char**)NULL)
+#endif
+
 using namespace uhd;

 ads1015_ctrl::ads1015_ctrl()
--- a/host/ads1015_ctrl.hpp
+++ b/host/ads1015_ctrl.hpp
@@ -29,7 +29,7 @@
 *
 * Control of TI's ADS1015 12bit ADC with 4 muliplexers
 */
-class UHD_API ads1015_ctrl {
+class ads1015_ctrl {
 public:
    enum ads1015_addr {
        ADS1015_NONE        = 0,
--- a/host/cmake/GetGitRevisionDescription.cmake
+++ b/host/cmake/GetGitRevisionDescription.cmake
@@ -0,0 +1,136 @@
+# - Returns a version string from Git
+#
+# These functions force a re-configure on each git commit so that you can
+# trust the values of the variables in your build system.
+#
+#  get_git_head_revision(<refspecvar> <hashvar> [<additional arguments to git describe> ...])
+#
+# Returns the refspec and sha hash of the current head revision
+#
+#  git_describe(<var> [<additional arguments to git describe> ...])
+#
+# Returns the results of git describe on the source tree, and adjusting
+# the output so that it tests false if an error occurs.
+#
+#  git_get_exact_tag(<var> [<additional arguments to git describe> ...])
+#
+# Returns the results of git describe --exact-match on the source tree,
+# and adjusting the output so that it tests false if there was no exact
+# matching tag.
+#
+# Requires CMake 2.6 or newer (uses the 'function' command)
+#
+# Original Author:
+# 2009-2010 Ryan Pavlik <rpavlik@iastate.edu> <abiryan@ryand.net>
+# http://academic.cleardefinition.com
+# Iowa State University HCI Graduate Program/VRAC
+#
+# Copyright Iowa State University 2009-2010.
+# Distributed under the Boost Software License, Version 1.0.
+# (See accompanying file LICENSE_1_0.txt or copy at
+# http://www.boost.org/LICENSE_1_0.txt)
+
+if(__get_git_revision_description)
+	return()
+endif()
+set(__get_git_revision_description YES)
+
+# We must run the following at "include" time, not at function call time,
+# to find the path to this module rather than the path to a calling list file
+get_filename_component(_gitdescmoddir ${CMAKE_CURRENT_LIST_FILE} PATH)
+
+function(get_git_head_revision _refspecvar _hashvar)
+	set(GIT_PARENT_DIR "${CMAKE_CURRENT_SOURCE_DIR}")
+	set(GIT_DIR "${GIT_PARENT_DIR}/.git")
+	while(NOT EXISTS "${GIT_DIR}")	# .git dir not found, search parent directories
+		set(GIT_PREVIOUS_PARENT "${GIT_PARENT_DIR}")
+		get_filename_component(GIT_PARENT_DIR ${GIT_PARENT_DIR} PATH)
+		if(GIT_PARENT_DIR STREQUAL GIT_PREVIOUS_PARENT)
+			# We have reached the root directory, we are not in git
+			set(${_refspecvar} "GITDIR-NOTFOUND" PARENT_SCOPE)
+			set(${_hashvar} "GITDIR-NOTFOUND" PARENT_SCOPE)
+			return()
+		endif()
+		set(GIT_DIR "${GIT_PARENT_DIR}/.git")
+	endwhile()
+	# check if this is a submodule
+	if(NOT IS_DIRECTORY ${GIT_DIR})
+		file(READ ${GIT_DIR} submodule)
+		string(REGEX REPLACE "gitdir: (.*)\n$" "\\1" GIT_DIR_RELATIVE ${submodule})
+		get_filename_component(SUBMODULE_DIR ${GIT_DIR} PATH)
+		get_filename_component(GIT_DIR ${SUBMODULE_DIR}/${GIT_DIR_RELATIVE} ABSOLUTE)
+	endif()
+	set(GIT_DATA "${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/git-data")
+	if(NOT EXISTS "${GIT_DATA}")
+		file(MAKE_DIRECTORY "${GIT_DATA}")
+	endif()
+
+	if(NOT EXISTS "${GIT_DIR}/HEAD")
+		return()
+	endif()
+	set(HEAD_FILE "${GIT_DATA}/HEAD")
+	configure_file("${GIT_DIR}/HEAD" "${HEAD_FILE}" COPYONLY)
+
+	configure_file("${_gitdescmoddir}/GetGitRevisionDescription.cmake.in"
+		"${GIT_DATA}/grabRef.cmake"
+		@ONLY)
+	include("${GIT_DATA}/grabRef.cmake")
+
+	set(${_refspecvar} "${HEAD_REF}" PARENT_SCOPE)
+	set(${_hashvar} "${HEAD_HASH}" PARENT_SCOPE)
+endfunction()
+
+function(git_describe _var)
+	if(NOT GIT_FOUND)
+		find_package(Git QUIET)
+	endif()
+	get_git_head_revision(refspec hash)
+	if(NOT GIT_FOUND)
+		set(${_var} "GIT-NOTFOUND" PARENT_SCOPE)
+		return()
+	endif()
+	if(NOT hash)
+		set(${_var} "HEAD-HASH-NOTFOUND" PARENT_SCOPE)
+		return()
+	endif()
+
+	# TODO sanitize
+	#if((${ARGN}" MATCHES "&&") OR
+	#	(ARGN MATCHES "||") OR
+	#	(ARGN MATCHES "\\;"))
+	#	message("Please report the following error to the project!")
+	#	message(FATAL_ERROR "Looks like someone's doing something nefarious with git_describe! Passed arguments ${ARGN}")
+	#endif()
+
+	#message(STATUS "Arguments to execute_process: ${ARGN}")
+
+	#support dirty option (hash cant be specified)
+	list(FIND ARGN "--dirty" _index)
+	if (${_index} GREATER -1)
+		unset(hash)
+	endif()
+
+	execute_process(COMMAND
+		"${GIT_EXECUTABLE}"
+		describe
+		${hash}
+		${ARGN}
+		WORKING_DIRECTORY
+		"${CMAKE_SOURCE_DIR}"
+		RESULT_VARIABLE
+		res
+		OUTPUT_VARIABLE
+		out
+		ERROR_QUIET
+		OUTPUT_STRIP_TRAILING_WHITESPACE)
+	if(NOT res EQUAL 0)
+		set(out "${out}-${res}-NOTFOUND")
+	endif()
+
+	set(${_var} "${out}" PARENT_SCOPE)
+endfunction()
+
+function(git_get_exact_tag _var)
+	git_describe(out --exact-match ${ARGN})
+	set(${_var} "${out}" PARENT_SCOPE)
+endfunction()
--- a/host/cmake/GetGitRevisionDescription.cmake.in
+++ b/host/cmake/GetGitRevisionDescription.cmake.in
@@ -0,0 +1,38 @@
+# 
+# Internal file for GetGitRevisionDescription.cmake
+#
+# Requires CMake 2.6 or newer (uses the 'function' command)
+#
+# Original Author:
+# 2009-2010 Ryan Pavlik <rpavlik@iastate.edu> <abiryan@ryand.net>
+# http://academic.cleardefinition.com
+# Iowa State University HCI Graduate Program/VRAC
+#
+# Copyright Iowa State University 2009-2010.
+# Distributed under the Boost Software License, Version 1.0.
+# (See accompanying file LICENSE_1_0.txt or copy at
+# http://www.boost.org/LICENSE_1_0.txt)
+
+set(HEAD_HASH)
+
+file(READ "@HEAD_FILE@" HEAD_CONTENTS LIMIT 1024)
+
+string(STRIP "${HEAD_CONTENTS}" HEAD_CONTENTS)
+if(HEAD_CONTENTS MATCHES "ref")
+	# named branch
+	string(REPLACE "ref: " "" HEAD_REF "${HEAD_CONTENTS}")
+	if(EXISTS "@GIT_DIR@/${HEAD_REF}")
+		configure_file("@GIT_DIR@/${HEAD_REF}" "@GIT_DATA@/head-ref" COPYONLY)
+	elseif(EXISTS "@GIT_DIR@/logs/${HEAD_REF}")
+		configure_file("@GIT_DIR@/logs/${HEAD_REF}" "@GIT_DATA@/head-ref" COPYONLY)
+		set(HEAD_HASH "${HEAD_REF}")
+	endif()
+else()
+	# detached HEAD
+	configure_file("@GIT_DIR@/HEAD" "@GIT_DATA@/head-ref" COPYONLY)
+endif()
+
+if(NOT HEAD_HASH)
+	file(READ "@GIT_DATA@/head-ref" HEAD_HASH LIMIT 1024)
+	string(STRIP "${HEAD_HASH}" HEAD_HASH)
+endif()
--- a/host/cores/apply_corrections.cpp
+++ b/host/cores/apply_corrections.cpp
@@ -105,7 +105,13 @@ static void apply_fe_corrections(

    //make the calibration file path
    const fs::path cal_data_path = fs::path(uhd::get_app_path()) / ".uhd" / "cal" / (file_prefix + db_eeprom.serial + ".csv");
-    if (not fs::exists(cal_data_path)) return;
+    UHD_MSG(status) << "Looking for FE correction at: " << cal_data_path.c_str() << "...  ";
+    if (not fs::exists(cal_data_path)) {
+        UHD_MSG(status) << "Not found" << std::endl;
+        return;
+    }
+
+    UHD_MSG(status) << "Found, loading...  ";

    //parse csv file or get from cache
    if (not fe_cal_cache.has_key(cal_data_path.string())){
@@ -133,8 +139,9 @@ static void apply_fe_corrections(
        }
        std::sort(datas.begin(), datas.end(), fe_cal_comp);
        fe_cal_cache[cal_data_path.string()] = datas;
-        UHD_MSG(status) << "Loaded " << cal_data_path.string() << std::endl;
-
+        UHD_MSG(status) << "Loaded" << std::endl;
+    } else {
+        UHD_MSG(status) << "Loaded from cache" << std::endl;
    }

    sub_tree->access<std::complex<double> >(fe_path)
--- a/host/lms6002d.hpp
+++ b/host/lms6002d.hpp
@@ -19,8 +19,9 @@
 #define INCLUDED_LMS6002D_HPP

 #include <stdio.h>
-#include <inttypes.h>
+#include <stdint.h>
 #include <assert.h>
+#include <cmath>

 /*!
 * LMS6002D control class
@@ -91,6 +92,14 @@ public:
        lms_clear_bits(0x09, (1 << 2));
    }

+    bool get_tx_pll_locked() {
+        return get_txrx_pll_locked(0x10);
+    }
+
+    bool get_rx_pll_locked() {
+        return get_txrx_pll_locked(0x20);
+    }
+
    uint8_t get_tx_pa() {
        return lms_read_shift(0x44, (0x07 << 3), 3);
    }
@@ -134,23 +143,49 @@ public:
        return lms_read_shift(0x41, 0x1f, 0) - 35;
    }

-	/** Set Rx VGA1 gain.
-	gain is raw values [0 .. 127]
+	/** Set Rx VGA1 gain raw value
+	gain is raw values [0 .. 120]
 	Returns the old gain value */
-	int8_t set_rx_vga1gain(int8_t gain){
-		if (gain < 0) // according to standard max value of int8_t is always 127
+	int8_t set_rx_vga1gain_int(int8_t gain){
+		if (gain < 0 || gain >120)
 			gain = 0;
 		int8_t old_bits = lms_write_bits(0x76, 0x7f, gain);
 		return old_bits & 0x7f;
 	}

-	/** Get Rx VGA1 gain in dB.
-	gain is in [0 .. 127] range of abstract values
+	/** Get Rx VGA1 gain raw value
+	gain is in [0 .. 120] range of abstract values
 	Returns the gain value */
-	int8_t get_rx_vga1gain(){
+	int8_t get_rx_vga1gain_int(){
 		return lms_read_shift(0x76, 0x7f, 0);
 	}

+    /** Converts Rx VGA1 raw values to absolute dBs
+    code must be in [0 .. 120] range */
+    double rxvga1_int_to_db(int8_t code){
+        return 5.0 + 20*log10(127.0/(127.0-code));
+    }
+
+    /** Converts Rx VGA1 gain into raw integer values
+    db must be in [5 .. 30.17] dB range */
+    int8_t rxvga1_db_to_int(double db){
+        return (int8_t)(127.5 - 127 / pow(10, (db-5.0)/20));
+    }
+
+    /** Set Rx VGA1 gain in dB
+	gain is in [5 .. 30.17] dB range
+	Returns the old gain value */
+	double set_rx_vga1gain(double gain){
+		int8_t code = rxvga1_db_to_int(gain);
+		return rxvga1_int_to_db(set_rx_vga1gain_int(code));
+	}
+
+	/** Get Rx VGA1 gain in dB
+    Returns the gain value in [5 .. 30.17] dB range */
+	double get_rx_vga1gain(){
+		return rxvga1_int_to_db(get_rx_vga1gain_int());
+	}
+
    /**  Set VGA2 gain.
    gain is in dB [0 .. 25]
    Returns the old gain value */
@@ -472,6 +507,14 @@ public:
 protected:
    double txrx_pll_tune(uint8_t reg, double ref_clock, double out_freq);

+    bool get_txrx_pll_locked(uint8_t reg) {
+        int comp = read_reg(reg + 0x0a) >> 6;
+        if (comp == 0x00)
+            return true;
+        else
+            return false;
+    }
+
    void lms_set_bits(uint8_t address, uint8_t mask) {
        write_reg(address, read_reg(address) | (mask));
    }
--- a/host/lms6002d_ctrl.cpp
+++ b/host/lms6002d_ctrl.cpp
@@ -21,6 +21,7 @@
 #include <boost/thread.hpp>
 #include <boost/array.hpp>
 #include <boost/math/special_functions/round.hpp>
+#include <boost/thread/recursive_mutex.hpp>
 #include <utility>
 #include <cmath>
 #include <cfloat>
@@ -69,7 +70,34 @@ static const uhd::dict<std::string, gain_range_t> lms_tx_gain_ranges = map_list_
 ;

 static const uhd::dict<std::string, gain_range_t> lms_rx_gain_ranges = map_list_of
-    ("VGA1", gain_range_t(0, 126, double(1.0)))
+    // VGA1 follows the approximation of [dB] = 5 + 20*log10(127/(127-Code)) where 0 <= Code <= 120
+    ("VGA1", gain_range_t( list_of
+         (range_t(5.00))(range_t(5.07))(range_t(5.14))(range_t(5.21))(range_t(5.28))
+         (range_t(5.35))(range_t(5.42))(range_t(5.49))(range_t(5.57))(range_t(5.64))
+         (range_t(5.71))(range_t(5.79))(range_t(5.86))(range_t(5.94))(range_t(6.01))
+         (range_t(6.09))(range_t(6.17))(range_t(6.25))(range_t(6.33))(range_t(6.41))
+         (range_t(6.49))(range_t(6.57))(range_t(6.65))(range_t(6.74))(range_t(6.82))
+         (range_t(6.90))(range_t(6.99))(range_t(7.08))(range_t(7.16))(range_t(7.25))
+         (range_t(7.34))(range_t(7.43))(range_t(7.52))(range_t(7.61))(range_t(7.71))
+         (range_t(7.80))(range_t(7.90))(range_t(7.99))(range_t(8.09))(range_t(8.19))
+         (range_t(8.29))(range_t(8.39))(range_t(8.49))(range_t(8.59))(range_t(8.69))
+         (range_t(8.80))(range_t(8.91))(range_t(9.01))(range_t(9.12))(range_t(9.23))
+         (range_t(9.35))(range_t(9.46))(range_t(9.57))(range_t(9.69))(range_t(9.81))
+         (range_t(9.93))(range_t(10.05))(range_t(10.17))(range_t(10.30))(range_t(10.43))
+         (range_t(10.55))(range_t(10.69))(range_t(10.82))(range_t(10.95))(range_t(11.09))
+         (range_t(11.23))(range_t(11.37))(range_t(11.51))(range_t(11.66))(range_t(11.81))
+         (range_t(11.96))(range_t(12.11))(range_t(12.27))(range_t(12.43))(range_t(12.59))
+         (range_t(12.76))(range_t(12.92))(range_t(13.10))(range_t(13.27))(range_t(13.45))
+         (range_t(13.63))(range_t(13.82))(range_t(14.01))(range_t(14.21))(range_t(14.41))
+         (range_t(14.61))(range_t(14.82))(range_t(15.03))(range_t(15.25))(range_t(15.48))
+         (range_t(15.71))(range_t(15.95))(range_t(16.19))(range_t(16.45))(range_t(16.71))
+         (range_t(16.97))(range_t(17.25))(range_t(17.53))(range_t(17.83))(range_t(18.13))
+         (range_t(18.45))(range_t(18.78))(range_t(19.12))(range_t(19.47))(range_t(19.84))
+         (range_t(20.23))(range_t(20.63))(range_t(21.06))(range_t(21.50))(range_t(21.97))
+         (range_t(22.47))(range_t(22.99))(range_t(23.55))(range_t(24.15))(range_t(24.80))
+         (range_t(25.49))(range_t(26.25))(range_t(27.08))(range_t(27.99))(range_t(29.01))
+         (range_t(30.17))
+         ))
 	// We limit Rx VGA2 to 30dB, as docs say higher values are dangerous
    ("VGA2", gain_range_t(0, 30, double(3.0)))
 // ToDo: Add LNA control here
@@ -87,14 +115,14 @@ public:
    umtrx_lms6002d_dev(uhd::spi_iface::sptr spiface, const int slaveno) : _spiface(spiface), _slaveno(slaveno) {};

    virtual void write_reg(uint8_t addr, uint8_t data) {
-        if (verbosity>2) printf("lms6002d_ctrl_impl::write_reg(addr=0x%x, data=0x%x)\n", addr, data);
+        if (verbosity>2) printf("umtrx_lms6002d_dev::write_reg(addr=0x%x, data=0x%x)\n", addr, data);
        uint16_t command = (((uint16_t)0x80 | (uint16_t)addr) << 8) | (uint16_t)data;
        _spiface->write_spi(_slaveno, spi_config_t::EDGE_RISE, command, 16);
    }
    virtual uint8_t read_reg(uint8_t addr) {
        if(addr > 127) return 0; // incorrect address, 7 bit long expected
        uint8_t data = _spiface->read_spi(_slaveno, spi_config_t::EDGE_RISE, addr << 8, 16);
-        if (verbosity>2) printf("lms6002d_ctrl_impl::read_reg(addr=0x%x) data=0x%x\n", addr, data);
+        if (verbosity>2) printf("umtrx_lms6002d_dev::read_reg(addr=0x%x) data=0x%x\n", addr, data);
        return data;
    }
 };
@@ -125,6 +153,18 @@ public:
        return this->set_enabled(dboard_iface::UNIT_TX, enb);
    }

+    uhd::sensor_value_t get_rx_pll_locked()
+    {
+        boost::recursive_mutex::scoped_lock l(_mutex);
+        return uhd::sensor_value_t("LO", lms.get_rx_pll_locked(), "locked", "unlocked");
+    }
+
+    uhd::sensor_value_t get_tx_pll_locked()
+    {
+        boost::recursive_mutex::scoped_lock l(_mutex);
+        return uhd::sensor_value_t("LO", lms.get_tx_pll_locked(), "locked", "unlocked");
+    }
+
    uhd::freq_range_t get_rx_bw_range(void)
    {
        return lms_bandwidth_range;
@@ -177,15 +217,20 @@ public:

    uint8_t get_tx_vga1dc_i_int(void)
    {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        return lms.get_tx_vga1dc_i_int();
    }

    uint8_t get_tx_vga1dc_q_int(void)
    {
-        return lms.get_tx_vga1dc_i_int();
+        boost::recursive_mutex::scoped_lock l(_mutex);
+        return lms.get_tx_vga1dc_q_int();
    }

+protected:
+
    double set_freq(dboard_iface::unit_t unit, double f) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_freq(%f)\n", f);
        unsigned ref_freq = _clock_rate;
        double actual_freq = 0;
@@ -215,6 +260,7 @@ public:
    }

    bool set_enabled(dboard_iface::unit_t unit, bool en) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_enabled(%d)\n", en);
        if (unit==dboard_iface::UNIT_RX) {
            if (en)
@@ -232,12 +278,13 @@ public:
    }

    double set_rx_gain(double gain, const std::string &name) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_rx_gain(%f, %s)\n", gain, name.c_str());
        assert_has(lms_rx_gain_ranges.keys(), name, "LMS6002D rx gain name");
-		if(name == "VGA1"){
+        if(name == "VGA1"){
            lms.set_rx_vga1gain(gain);
            return lms.get_rx_vga1gain();
-		} else if(name == "VGA2"){
+        } else if(name == "VGA2"){
            lms.set_rx_vga2gain(gain);
            return lms.get_rx_vga2gain();
        } else UHD_THROW_INVALID_CODE_PATH();
@@ -245,6 +292,7 @@ public:
    }

    void set_rx_ant(const std::string &ant) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_rx_ant(%s)\n", ant.c_str());
        //validate input
        assert_has(lms_rx_antennas, ant, "LMS6002D rx antenna name");
@@ -278,6 +326,7 @@ public:
    }

    double set_rx_bandwidth(double bandwidth) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_rx_bandwidth(%f)\n", bandwidth);
        // Get the closest available bandwidth
        bandwidth = lms_bandwidth_range.clip(bandwidth);
@@ -289,6 +338,7 @@ public:
    }

    double set_tx_gain(double gain, const std::string &name) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_tx_gain(%f, %s)\n", gain, name.c_str());
        //validate input
        assert_has(lms_tx_gain_ranges.keys(), name, "LMS6002D tx gain name");
@@ -310,6 +360,7 @@ public:
    }

    void set_tx_ant(const std::string &ant) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_tx_ant(%s)\n", ant.c_str());
        //validate input
        assert_has(lms_tx_antennas, ant, "LMS6002D tx antenna ant");
@@ -329,6 +380,7 @@ public:
    }

    double set_tx_bandwidth(double bandwidth) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_tx_bandwidth(%f)\n", bandwidth);
        // Get the closest available bandwidth
        bandwidth = lms_bandwidth_range.clip(bandwidth);
@@ -340,12 +392,14 @@ public:
    }

    uint8_t _set_tx_vga1dc_i_int(uint8_t offset) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_tx_vga1dc_i_int(%d)\n", offset);
        lms.set_tx_vga1dc_i_int(offset);
        return offset;
    }

    uint8_t _set_tx_vga1dc_q_int(uint8_t offset) {
+        boost::recursive_mutex::scoped_lock l(_mutex);
        if (verbosity>0) printf("lms6002d_ctrl_impl::set_tx_vga1dc_q_int(%d)\n", offset);
        lms.set_tx_vga1dc_q_int(offset);
        return offset;
@@ -363,6 +417,8 @@ private:
    const int _lms_spi_number;
    const int _adf4350_spi_number;
    const double _clock_rate;
+
+    boost::recursive_mutex _mutex;
 };

 lms6002d_ctrl::sptr lms6002d_ctrl::make(uhd::spi_iface::sptr spiface, const int lms_spi_number, const int adf4350_spi_number, const double clock_rate)
--- a/host/lms6002d_ctrl.hpp
+++ b/host/lms6002d_ctrl.hpp
@@ -3,6 +3,7 @@

 #include <uhd/types/ranges.hpp>
 #include <uhd/types/serial.hpp>
+#include <uhd/types/sensors.hpp>
 #include <boost/shared_ptr.hpp>
 #include <vector>
 #include <string>
@@ -22,6 +23,9 @@ public:
    virtual bool set_rx_enabled(const bool enb) = 0;
    virtual bool set_tx_enabled(const bool enb) = 0;

+    virtual uhd::sensor_value_t get_rx_pll_locked() = 0;
+    virtual uhd::sensor_value_t get_tx_pll_locked() = 0;
+
    virtual double set_rx_gain(const double gain, const std::string &name) = 0;
    virtual double set_tx_gain(const double gain, const std::string &name) = 0;

--- a/host/power_amp.cpp
+++ b/host/power_amp.cpp
@@ -0,0 +1,280 @@
+#include "power_amp.hpp"
+#include <uhd/utils/msg.hpp>
+#include <uhd/exception.hpp>
+#include <boost/assign/list_of.hpp>
+#include <boost/foreach.hpp>
+#include <boost/algorithm/string.hpp>
+#include <cmath>
+
+using namespace uhd;
+
+/***********************************************************************
+ * Declarations
+ **********************************************************************/
+
+class power_amp_impl : public power_amp {
+public:
+
+    // Voltage to Watts curves
+    typedef std::map<double,double> pa_curve_t;
+
+    power_amp_impl(pa_type_t pa_type, const pa_curve_t &v2w, const pa_curve_t &w2v);
+    virtual ~power_amp_impl();
+
+    // Get the PA type
+    virtual pa_type_t get_pa_type() const {return _pa_type;}
+
+    // Get the PA type as a string
+    virtual std::string get_pa_type_str() const {return pa_type_to_str(_pa_type);}
+
+    // Minimum and maximum supported output power in watts
+    virtual double min_power_w() const;
+    virtual double max_power_w() const;
+    // Minimum and maximum supported output power in dBm
+    virtual double min_power_dBm() const;
+    virtual double max_power_dBm() const;
+
+    // Get output power in watts for a given voltage
+    virtual double v2w(double v) const;
+    // Get input voltage required to generate given output power (in watts)
+    virtual double w2v(double w) const;
+    // Get output power in dBm for a given voltage
+    virtual double v2dBm(double v) const;
+    // Get input voltage required to generate given output power (in dBm)
+    virtual double dBm2v(double dBm) const;
+
+protected:
+
+    // The PA type
+    pa_type_t _pa_type;
+
+    // Curves
+    const pa_curve_t &_v2w_curve;
+    const pa_curve_t _w2v_curve;
+};
+
+// Interpolate curve values
+static double pa_interpolate_curve(const power_amp_impl::pa_curve_t &curve, double v);
+// Convert an A->B map into a B->A map
+template<typename map_t> static map_t map_reverse(map_t curve);
+
+/***********************************************************************
+ * Constants
+ **********************************************************************/
+
+// NOTE: All names MUST be uppercase for pa_str_to_type() to work correctly
+const power_amp::pa_type_map_pair_t power_amp::_pa_type_map[] = {
+    {power_amp::PA_NONE, "NONE"}, // Also serves as the default
+    {power_amp::PA_EPA881F40A, "EPA881F40A"},
+    {power_amp::PA_EPA942H40A, "EPA942H40A"},
+    {power_amp::PA_EPA1800F37A, "EPA1800F37A"}
+};
+
+const power_amp_impl::pa_curve_t EPA942H40A_v2w_curve = boost::assign::map_list_of
+    (9.5,   1.15)
+    (10,    1.31)
+    (11,    1.6)
+    (12,    1.9)
+    (12.5,  2.1)
+    (13,    2.25)
+    (13.5,  2.44)
+    (14,    2.6)
+    (14.5,  2.8)
+    (15,    3.0)
+    (15.5,  3.2)
+    (16,    3.45)
+    (16.5,  3.7)
+    (17,    3.9)
+    (17.5,  4.1)
+    (18,    4.35)
+    (18.5,  4.6)
+    (19,    4.8)
+    (19.5,  5.1)
+    (20,    5.4)
+    (20.5,  5.65)
+    (21.1,  6.0)
+    (21.6,  6.2)
+    (22.1,  6.5)
+    (22.6,  6.8)
+    (23.1,  7.1)
+    (23.4,  7.25)
+    (23.7,  7.4)
+    (24,    7.55)
+    (24.2,  7.7)
+    (24.5,  7.9)
+    (24.8,  8.0)
+    (25.2,  8.25)
+    (25.5,  8.45)
+    (25.9,  8.65)
+    (26.2,  8.9)
+    (26.6,  9.1)
+    (28,   10.0);
+
+/***********************************************************************
+ * Static functions
+ **********************************************************************/
+
+template<typename map_t>
+static map_t map_reverse(map_t curve)
+{
+    map_t reversed;
+
+    for (typename map_t::iterator i = curve.begin(); i != curve.end(); ++i)
+        reversed[i->second] = i->first;
+
+    return reversed;
+}
+
+static double pa_interpolate_curve(const power_amp_impl::pa_curve_t &curve, double v)
+{
+    power_amp_impl::pa_curve_t::const_iterator i = curve.upper_bound(v);
+    if (i == curve.end())
+    {
+        return (--i)->second;
+    }
+    if (i == curve.begin())
+    {
+        return i->second;
+    }
+    power_amp_impl::pa_curve_t::const_iterator l=i;
+    --l;
+
+    const double delta=(v - l->first) / (i->first - l->first);
+    return delta*i->second + (1-delta)*l->second;
+}
+
+/***********************************************************************
+ * Make
+ **********************************************************************/
+power_amp::sptr power_amp::make(pa_type_t pa_type) {
+    switch (pa_type) {
+    case PA_NONE:
+        return power_amp::sptr();
+    case PA_EPA881F40A:
+    case PA_EPA942H40A:
+    case PA_EPA1800F37A:
+    default:
+        return power_amp::sptr(new power_amp_impl(pa_type, EPA942H40A_v2w_curve,
+                                                  map_reverse(EPA942H40A_v2w_curve)));
+    }
+}
+
+/***********************************************************************
+ * power_amp methods
+ **********************************************************************/
+
+power_amp::~power_amp()
+{
+}
+
+std::string power_amp::pa_type_to_str(pa_type_t pa)
+{
+    BOOST_FOREACH(const power_amp::pa_type_map_pair_t &pa_map_pair, _pa_type_map)
+    {
+        if (pa_map_pair.type == pa)
+            return pa_map_pair.name;
+    }
+    throw uhd::environment_error("Can't map PA type to a string.");
+    return "NONE";
+}
+
+power_amp::pa_type_t power_amp::pa_str_to_type(const std::string &pa_str)
+{
+    std::string pa_str_upper = boost::to_upper_copy(pa_str);
+    BOOST_FOREACH(const power_amp::pa_type_map_pair_t &pa_map_pair, _pa_type_map)
+    {
+        if (pa_map_pair.name == pa_str_upper)
+            return pa_map_pair.type;
+    }
+    UHD_MSG(error) << "PA name " << pa_str << " is not recognized. "
+                   << "Setting PA type to NONE." << std::endl;
+    return power_amp::PA_NONE;
+}
+
+std::list<power_amp::pa_type_t> power_amp::list_pa_type()
+{
+    std::list<power_amp::pa_type_t> list;
+
+    BOOST_FOREACH(const power_amp::pa_type_map_pair_t &pa_map_pair, _pa_type_map) {
+        list.push_back(pa_map_pair.type);
+    }
+
+    return list;
+}
+
+std::list<std::string> power_amp::list_pa_str()
+{
+    std::list<std::string> list;
+
+    BOOST_FOREACH(const power_amp::pa_type_map_pair_t &pa_map_pair, _pa_type_map) {
+        list.push_back(pa_map_pair.name);
+    }
+
+    return list;
+}
+
+double power_amp::w2dBm(double w)
+{
+    return 10*log10(w) + 30;
+}
+
+double power_amp::dBm2w(double dBm)
+{
+    return pow(10, (dBm-30)/10);
+}
+
+/***********************************************************************
+ * power_amp_impl methods
+ **********************************************************************/
+
+power_amp_impl::power_amp_impl(pa_type_t pa_type, const pa_curve_t &v2w, const pa_curve_t &w2v)
+    : _pa_type(pa_type)
+    , _v2w_curve(v2w)
+    , _w2v_curve(w2v)
+{
+
+}
+
+power_amp_impl::~power_amp_impl()
+{
+}
+
+double power_amp_impl::min_power_w() const
+{
+    return _w2v_curve.begin()->first;
+}
+
+double power_amp_impl::max_power_w() const
+{
+    return _w2v_curve.rbegin()->first;
+}
+
+double power_amp_impl::min_power_dBm() const
+{
+    return w2dBm(min_power_w());
+}
+
+double power_amp_impl::max_power_dBm() const
+{
+    return w2dBm(max_power_w());
+}
+
+double power_amp_impl::v2w(double v) const
+{
+    return pa_interpolate_curve(_v2w_curve, v);
+}
+
+double power_amp_impl::w2v(double w) const
+{
+    return pa_interpolate_curve(_w2v_curve, w);
+}
+
+double power_amp_impl::v2dBm(double v) const
+{
+    return w2dBm(v2w(v));
+}
+
+double power_amp_impl::dBm2v(double dBm) const
+{
+    return w2v(dBm2w(dBm));
+}
--- a/host/power_amp.hpp
+++ b/host/power_amp.hpp
@@ -0,0 +1,75 @@
+#ifndef POWER_AMP_HPP
+#define POWER_AMP_HPP
+
+#include <uhd/config.hpp>
+#include <map>
+#include <list>
+#include <boost/shared_ptr.hpp>
+
+namespace uhd {
+
+class power_amp {
+public:
+
+    // Supported Power Amplifiers
+    enum pa_type_t {
+        PA_NONE,         // No PA connected
+        PA_EPA881F40A,   // EPA881F40A GSM850
+        PA_EPA942H40A,   // EPA942H40A EGSM900
+        PA_EPA1800F37A   // EPA1800F37A DCS1800
+    };
+
+    typedef boost::shared_ptr<power_amp> sptr;
+    static power_amp::sptr make(pa_type_t pa_type);
+    virtual ~power_amp();
+
+    // Get the PA type
+    virtual pa_type_t get_pa_type() const =0;
+    // Get the PA type as a string
+    virtual std::string get_pa_type_str() const =0;
+
+    // Convert PA type to a string
+    static std::string pa_type_to_str(pa_type_t pa);
+    // Convert a string to a PA type
+    static pa_type_t pa_str_to_type(const std::string &pa_str);
+
+	// Return a list of PA types
+	static std::list<pa_type_t> list_pa_type();
+	// Return a list of PA type strings
+	static std::list<std::string> list_pa_str();
+
+    // Convert watts -> dBm
+    static double w2dBm(double w);
+    // Convert dBm -> watts
+    static double dBm2w(double dBm);
+
+    // Minimum and maximum supported output power in watts
+    virtual double min_power_w() const =0;
+    virtual double max_power_w() const =0;
+    // Minimum and maximum supported output power in dBm
+    virtual double min_power_dBm() const =0;
+    virtual double max_power_dBm() const =0;
+
+    // Get output power in watts for a given voltage
+    virtual double v2w(double v) const =0;
+    // Get input voltage required to generate given output power (in watts)
+    virtual double w2v(double w) const =0;
+    // Get output power in dBm for a given voltage
+    virtual double v2dBm(double v) const =0;
+    // Get input voltage required to generate given output power (in dBm)
+    virtual double dBm2v(double dBm) const =0;
+
+protected:
+
+    // Map PA types to string names
+    struct pa_type_map_pair_t {
+        pa_type_t type;
+        std::string name;
+    };
+    static const pa_type_map_pair_t _pa_type_map[];
+
+};
+
+}
+
+#endif // POWER_AMP_HPP
--- a/host/tmp102_ctrl.cpp
+++ b/host/tmp102_ctrl.cpp
@@ -20,6 +20,10 @@

 #include <iostream>

+#if defined(_MSC_VER) && (_MSC_VER <= 1700)
+#define nan(arg) std::strtod("NAN()", (char**)NULL)
+#endif
+
 using namespace uhd;

 tmp102_ctrl::tmp102_ctrl()
--- a/host/tmp102_ctrl.hpp
+++ b/host/tmp102_ctrl.hpp
@@ -29,7 +29,7 @@
 *
 * Control of TI's TMP102 temperature sensors
 */
-class UHD_API tmp102_ctrl {
+class tmp102_ctrl {
 public:
        enum conversion_rate {
            TMP102_CR_025HZ = 0,
--- a/host/umtrx_fifo_ctrl.cpp
+++ b/host/umtrx_fifo_ctrl.cpp
@@ -29,11 +29,16 @@
 using namespace uhd;
 using namespace uhd::transport;

+//command policy flags
 static const size_t POKE32_CMD = (1 << 8);
-static const size_t PEEK32_CMD = 0;
+static const size_t PEEK32_CMD = 0; //no flag set
+static const size_t TIME_WAIT_CMD = (1 << 9);
+static const size_t SKIP_LATE_CMD = (1 << 10);
+
 static const double ACK_TIMEOUT = 0.5;
 static const double MASSIVE_TIMEOUT = 10.0; //for when we wait on a timed command
-static const boost::uint32_t MAX_SEQS_OUT = 15;
+static const boost::uint32_t FIFO_DEPTH = 64;
+static const boost::uint32_t MAX_SEQS_OUT = FIFO_DEPTH-1;

 #define SPI_DIV SR_SPI_CORE + 0
 #define SPI_CTRL SR_SPI_CORE + 1
@@ -44,13 +49,21 @@ static const boost::uint32_t MAX_SEQS_OUT = 15;
 class umtrx_fifo_ctrl_impl : public umtrx_fifo_ctrl{
 public:

-    umtrx_fifo_ctrl_impl(zero_copy_if::sptr xport, const boost::uint32_t sid):
+    umtrx_fifo_ctrl_impl(zero_copy_if::sptr xport, const boost::uint32_t sid, const boost::uint32_t window_size):
        _xport(xport),
        _sid(sid),
+        _window_size(std::min(window_size, MAX_SEQS_OUT)),
        _seq_out(0),
        _seq_ack(0),
+        _prev_recv_seq(0),
+        _total_recv_packets(0),
+        _start_of_burst(false),
+        _skip_late(false),
+        _use_time(false),
+        _tick_rate(1.0),
        _timeout(ACK_TIMEOUT)
    {
+        UHD_MSG(status) << "fifo_ctrl.window_size = " << _window_size << std::endl;
        while (_xport->get_recv_buff(0.0)){} //flush
        this->set_time(uhd::time_spec_t(0.0));
        this->set_tick_rate(1.0); //something possible but bogus
@@ -72,7 +85,7 @@ public:

        this->send_pkt((addr - SETTING_REGS_BASE)/4, data, POKE32_CMD);

-        this->wait_for_ack(_seq_out-MAX_SEQS_OUT);
+        this->wait_for_ack(_seq_out-_window_size);
    }

    boost::uint32_t peek32(wb_addr_type addr){
@@ -101,7 +114,7 @@ public:
        boost::mutex::scoped_lock lock(_mutex);

        this->send_pkt(SPI_DIV, SPI_DIVIDER, POKE32_CMD);
-        this->wait_for_ack(_seq_out-MAX_SEQS_OUT);
+        this->wait_for_ack(_seq_out-_window_size);

        _ctrl_word_cache = 0; // force update first time around
    }
@@ -128,13 +141,13 @@ public:
        //conditionally send control word
        if (_ctrl_word_cache != ctrl_word){
            this->send_pkt(SPI_CTRL, ctrl_word, POKE32_CMD);
-            this->wait_for_ack(_seq_out-MAX_SEQS_OUT);
+            this->wait_for_ack(_seq_out-_window_size);
            _ctrl_word_cache = ctrl_word;
        }

        //send data word
        this->send_pkt(SPI_DATA, data_out, POKE32_CMD);
-        this->wait_for_ack(_seq_out-MAX_SEQS_OUT);
+        this->wait_for_ack(_seq_out-_window_size);

        //conditional readback
        if (readback){
@@ -153,6 +166,7 @@ public:
        _time = time;
        _use_time = _time != uhd::time_spec_t(0.0);
        if (_use_time) _timeout = MASSIVE_TIMEOUT; //permanently sets larger timeout
+        _start_of_burst = true;
    }

    void set_tick_rate(const double rate){
@@ -160,6 +174,11 @@ public:
        _tick_rate = rate;
    }

+    void set_late_policy(const bool skip_late)
+    {
+        _skip_late = skip_late;
+    }
+
 private:

    /*******************************************************************
@@ -182,7 +201,8 @@ private:
        packet_info.packet_count = _seq_out;
        packet_info.sid = _sid;
        packet_info.tsf = _time.to_ticks(_tick_rate);
-        packet_info.sob = false;
+        packet_info.sob = _start_of_burst;
+        _start_of_burst = false; //only set once by set time, then cleared
        packet_info.eob = false;
        packet_info.has_sid = true;
        packet_info.has_cid = false;
@@ -193,6 +213,10 @@ private:
        //load header
        vrt::if_hdr_pack_be(pkt, packet_info);

+        //time command flags
+        if (_skip_late) cmd |= SKIP_LATE_CMD;
+        if (_use_time) cmd |= TIME_WAIT_CMD;
+
        //load payload
        const boost::uint32_t ctrl_word = (addr & 0xff) | cmd | (_seq_out << 16);
        pkt[packet_info.num_header_words32+0] = htonl(ctrl_word);
@@ -219,10 +243,50 @@ private:
            vrt::if_packet_info_t packet_info;
            packet_info.num_packet_words32 = buff->size()/sizeof(boost::uint32_t);
            vrt::if_hdr_unpack_be(pkt, packet_info);
-            _seq_ack = ntohl(pkt[packet_info.num_header_words32+0]) >> 16;
-            if (_seq_ack == seq_to_ack){
-                return ntohl(pkt[packet_info.num_header_words32+1]);
+
+            //extract the payloads
+            const boost::int32_t header = ntohl(pkt[packet_info.num_header_words32+0]);
+            const boost::int32_t rb_data = ntohl(pkt[packet_info.num_header_words32+1]);
+            const boost::int32_t last_header = ntohl(pkt[packet_info.num_header_words32+2]);
+            const boost::int32_t fifo_occupied = ntohl(pkt[packet_info.num_header_words32+3]);
+            const boost::uint16_t this_seq = header >> 16;
+            const boost::uint16_t last_seq = last_header >> 16;
+            const boost::uint16_t result_fifo_occupied = fifo_occupied >> 16;
+            const boost::uint16_t command_fifo_occupied = fifo_occupied & 0xffff;
+
+            //check if we lost packets from device -> host
+            const boost::uint16_t next_recv_seq = _prev_recv_seq+1;
+            if (next_recv_seq != this_seq)
+            {
+                UHD_MSG(error) << boost::format(
+                    "Detected packet loss from device to host:\n"
+                    "Host expected sequence 0x%x, but got 0x%x"
+                ) % next_recv_seq % this_seq << std::endl;
            }
+
+            //check if we lost packets from host -> device
+            if (_total_recv_packets != 0 and _prev_recv_seq != last_seq)
+            {
+                UHD_MSG(error) << boost::format(
+                    "Detected packet loss from host to device:\n"
+                    "Device expected last sequence 0x%x, but saw 0x%x"
+                ) % _prev_recv_seq % last_seq << std::endl;
+            }
+
+            if (result_fifo_occupied > FIFO_DEPTH/2 or command_fifo_occupied > FIFO_DEPTH/2)
+            {
+                UHD_MSG(warning) << boost::format(
+                    "FIFOs are past half capacity!\n"
+                    "Command FIFO occupancy: %d/%d\n"
+                    "Result FIFO occupancy: %d/%d"
+                ) % command_fifo_occupied % FIFO_DEPTH % result_fifo_occupied % FIFO_DEPTH << std::endl;
+            }
+
+            //store state for next recv iteration
+            _total_recv_packets++;
+            _prev_recv_seq = this_seq;
+            _seq_ack = this_seq;
+            if (_seq_ack == seq_to_ack) return rb_data;
        }

        return 0;
@@ -230,10 +294,16 @@ private:

    zero_copy_if::sptr _xport;
    const boost::uint32_t _sid;
+    const boost::uint32_t _window_size;
    boost::mutex _mutex;
    boost::uint16_t _seq_out;
    boost::uint16_t _seq_ack;
+    boost::uint16_t _prev_recv_seq;
+    boost::uint16_t _next_recv_seq;
+    boost::uint64_t _total_recv_packets;
    uhd::time_spec_t _time;
+    bool _start_of_burst;
+    bool _skip_late;
    bool _use_time;
    double _tick_rate;
    double _timeout;
@@ -241,6 +311,6 @@ private:
 };


-umtrx_fifo_ctrl::sptr umtrx_fifo_ctrl::make(zero_copy_if::sptr xport, const boost::uint32_t sid){
-    return sptr(new umtrx_fifo_ctrl_impl(xport, sid));
+umtrx_fifo_ctrl::sptr umtrx_fifo_ctrl::make(zero_copy_if::sptr xport, const boost::uint32_t sid, const size_t window_size){
+    return sptr(new umtrx_fifo_ctrl_impl(xport, sid, boost::uint32_t(window_size)));
 }
--- a/host/umtrx_fifo_ctrl.hpp
+++ b/host/umtrx_fifo_ctrl.hpp
@@ -36,7 +36,7 @@ public:
    typedef boost::shared_ptr<umtrx_fifo_ctrl> sptr;

    //! Make a new FIFO control object
-    static sptr make(uhd::transport::zero_copy_if::sptr xport, const boost::uint32_t sid);
+    static sptr make(uhd::transport::zero_copy_if::sptr xport, const boost::uint32_t sid, const size_t window_size);

    //! Set the command time that will activate
    virtual void set_time(const uhd::time_spec_t &time) = 0;
--- a/host/umtrx_impl.cpp
+++ b/host/umtrx_impl.cpp
@@ -17,6 +17,7 @@

 #include "umtrx_impl.hpp"
 #include "umtrx_regs.hpp"
+#include "umtrx_version.hpp"
 #include "cores/apply_corrections.hpp"
 #include <uhd/utils/log.hpp>
 #include <uhd/utils/msg.hpp>
@@ -32,6 +33,55 @@ using namespace uhd::usrp;
 using namespace uhd::transport;
 namespace asio = boost::asio;

+// Values recommended by Andrey Sviyazov
+const int umtrx_impl::UMTRX_VGA1_DEF = -20;
+const int umtrx_impl::UMTRX_VGA2_DEF = 22;
+const int umtrx_impl::UMTRX_VGA2_MIN = 0;
+
+static const double _dcdc_val_to_volt_init[256] =
+{
+     9.38,  9.38,  9.40,  9.42,  9.42,  9.44,  9.46,  9.46,  9.48,  9.50, // 10
+     9.50,  9.52,  9.54,  9.54,  9.56,  9.58,  9.58,  9.60,  9.60,  9.62, // 20
+     9.64,  9.66,  9.66,  9.68,  9.70,  9.70,  9.72,  9.74,  9.76,  9.76, // 30
+     9.78,  9.80,  9.82,  9.82,  9.84,  9.86,  9.88,  9.90,  9.92,  9.92, // 40
+     9.94,  9.96,  9.98,  9.98, 10.00, 10.02, 10.04, 10.06, 10.06, 10.08, // 50
+    10.10, 10.12, 10.14, 10.16, 10.18, 10.20, 10.20, 10.24, 10.24, 10.28, // 60
+    10.30, 10.32, 10.34, 10.34, 10.36, 10.38, 10.40, 10.42, 10.44, 10.46, // 70
+    10.48, 10.50, 10.52, 10.54, 10.56, 10.60, 10.62, 10.64, 10.66, 10.68, // 80
+    10.70, 10.72, 10.74, 10.76, 10.78, 10.80, 10.84, 10.86, 10.88, 10.90, // 90
+    10.94, 10.96, 10.98, 11.00, 11.02, 11.06, 11.06, 11.10, 11.12, 11.16, // 100
+    11.18, 11.20, 11.24, 11.26, 11.28, 11.32, 11.34, 11.38, 11.40, 11.44, // 110
+    11.46, 11.50, 11.50, 11.54, 11.58, 11.60, 11.64, 11.66, 11.70, 11.74, // 120
+    11.76, 11.80, 11.84, 11.86, 11.90, 11.94, 11.98, 12.00, 12.02, 12.06, // 130
+    12.10, 12.14, 12.18, 12.22, 12.26, 12.28, 12.32, 12.36, 12.40, 12.44, // 140
+    12.48, 12.54, 12.58, 12.62, 12.64, 12.68, 12.72, 12.76, 12.82, 12.86, // 150
+    12.90, 12.96, 13.00, 13.04, 13.10, 13.14, 13.20, 13.24, 13.30, 13.34, // 160
+    13.38, 13.44, 13.48, 13.54, 13.60, 13.66, 13.72, 13.76, 13.82, 13.88, // 170
+    13.94, 14.02, 14.06, 14.14, 14.20, 14.26, 14.30, 14.36, 14.42, 14.50, // 180
+    14.56, 14.64, 14.72, 14.78, 14.86, 14.92, 15.00, 15.08, 15.16, 15.24, // 190
+    15.32, 15.40, 15.46, 15.54, 15.62, 15.72, 15.80, 15.90, 16.00, 16.08, // 200
+    16.18, 16.28, 16.38, 16.48, 16.58, 16.68, 16.80, 16.90, 16.96, 17.08, // 210
+    17.20, 17.32, 17.44, 17.56, 17.68, 17.82, 17.94, 18.06, 18.20, 18.36, // 220
+    18.48, 18.64, 18.78, 18.94, 19.02, 19.18, 19.34, 19.50, 19.68, 19.84, // 230
+    20.02, 20.20, 20.38, 20.58, 20.76, 20.96, 21.18, 21.38, 21.60, 21.82, // 240
+    21.92, 22.16, 22.40, 22.66, 22.92, 23.18, 23.46, 23.74, 24.02, 24.30, // 250
+    24.62, 24.94, 25.28, 25.62, 25.98, 26.34
+};
+const std::vector<double> umtrx_impl::_dcdc_val_to_volt(_dcdc_val_to_volt_init, &_dcdc_val_to_volt_init[256]);
+
+/***********************************************************************
+ * Property tree "alias" function
+ **********************************************************************/
+
+template <typename T> property<T> &property_alias(uhd::property_tree::sptr &_tree,
+                                                  const uhd::fs_path &orig, const uhd::fs_path &alias)
+{
+    // By default route each chanel to its own antenna
+    return _tree->create<T>(alias)
+        .subscribe(boost::bind(&uhd::property<T>::set, boost::ref(_tree->access<T>(orig)), _1))
+        .publish(boost::bind(&uhd::property<T>::get, boost::ref(_tree->access<T>(orig))));
+}
+
 /***********************************************************************
 * Make
 **********************************************************************/
@@ -130,6 +180,7 @@ static mtu_result_t determine_mtu(const std::string &addr, const mtu_result_t &u
 umtrx_impl::umtrx_impl(const device_addr_t &device_addr)
 {
    _device_ip_addr = device_addr["addr"];
+    UHD_MSG(status) << "UmTRX driver version: " << UMTRX_VERSION << std::endl;
    UHD_MSG(status) << "Opening a UmTRX device... " << _device_ip_addr << std::endl;

    //mtu self check -- not really doing anything with it
@@ -181,7 +232,8 @@ umtrx_impl::umtrx_impl(const device_addr_t &device_addr)
    // high performance settings control
    ////////////////////////////////////////////////////////////////
    _iface->poke32(U2_REG_MISC_CTRL_SFC_CLEAR, 1); //clear settings fifo control state machine
-    _ctrl = umtrx_fifo_ctrl::make(this->make_xport(UMTRX_CTRL_FRAMER, device_addr_t()), UMTRX_CTRL_SID);
+    const size_t fifo_ctrl_window(device_addr.cast<size_t>("fifo_ctrl_window", 1024)); //default gets clipped to hardware maximum
+    _ctrl = umtrx_fifo_ctrl::make(this->make_xport(UMTRX_CTRL_FRAMER, device_addr_t()), UMTRX_CTRL_SID, fifo_ctrl_window);
    _ctrl->peek32(0); //test readback
    _tree->create<time_spec_t>(mb_path / "time/cmd")
        .subscribe(boost::bind(&umtrx_fifo_ctrl::set_time, _ctrl, _1));
@@ -218,16 +270,76 @@ umtrx_impl::umtrx_impl(const device_addr_t &device_addr)
    _tree->create<std::string>(mb_path / "hwrev").set(get_hw_rev());
    UHD_MSG(status) << "Detected UmTRX " << get_hw_rev() << std::endl;

+    ////////////////////////////////////////////////////////////////////////
+    // configure diversity switches
+    ////////////////////////////////////////////////////////////////////////

+    // note: the control is also aliased to RF frontend later
    _tree->create<bool>(mb_path / "divsw1")
-            .subscribe(boost::bind(&umtrx_impl::set_divsw1, this, _1));
+            .subscribe(boost::bind(&umtrx_impl::set_diversity, this, _1, 0))
+            .set(device_addr.cast<bool>("divsw1", false));
+    UHD_MSG(status) << "Diversity switch for channel 1: "
+                    << (_tree->access<bool>(mb_path / "divsw1").get()?"true":"false")
+                    << std::endl;
    _tree->create<bool>(mb_path / "divsw2")
-            .subscribe(boost::bind(&umtrx_impl::set_divsw2, this, _1));
+            .subscribe(boost::bind(&umtrx_impl::set_diversity, this, _1, 1))
+            .set(device_addr.cast<bool>("divsw2", false));
+    UHD_MSG(status) << "Diversity switch for channel 2: "
+                    << (_tree->access<bool>(mb_path / "divsw2").get()?"true":"false")
+                    << std::endl;

+    ////////////////////////////////////////////////////////////////////////
+    // set PLL divider
+    ////////////////////////////////////////////////////////////////////////

    // TODO: Add EEPROM cell to manually override this
    _pll_div = 1;

+    ////////////////////////////////////////////////////////////////////
+    // get the atached PA type
+    ////////////////////////////////////////////////////////////////////
+    std::list<std::string> pa_types = power_amp::list_pa_str();
+    std::string pa_list_str;
+    BOOST_FOREACH(const std::string &pa_str, pa_types)
+    {
+        pa_list_str += pa_str + " ";
+    }
+    UHD_MSG(status) << "Known PA types: " << pa_list_str << std::endl;
+
+    power_amp::pa_type_t pa_type = power_amp::pa_str_to_type(device_addr.cast<std::string>("pa", "NONE"));
+    if (_hw_rev < UMTRX_VER_2_3_1 and pa_type != power_amp::PA_NONE)
+    {
+        UHD_MSG(error) << "PA type " << power_amp::pa_type_to_str(pa_type) << " is not supported for UmTRX "
+                       << get_hw_rev() << ". Setting PA type to NONE." << std::endl;
+        pa_type = power_amp::PA_NONE;
+    }
+
+    for (char name = 'A'; name <= 'B'; name++)
+    {
+        std::string name_str = std::string(1, name);
+        _pa[name_str] = power_amp::make(pa_type);
+        UHD_MSG(status) << "Installed PA for side" << name_str << ": " << power_amp::pa_type_to_str(pa_type) << std::endl;
+    }
+
+    if (_pa["A"])
+    {
+        _pa_power_max_dBm = _pa["A"]->max_power_dBm();
+
+        double limit_w = device_addr.cast<double>("pa_power_max_w", _pa["A"]->max_power_w());
+        if (limit_w != _pa["A"]->max_power_w()) {
+            _pa_power_max_dBm = power_amp::w2dBm(limit_w);
+        }
+
+        double limit_dbm = device_addr.cast<double>("pa_power_max_dbm", _pa["A"]->max_power_dBm());
+        if (limit_dbm != _pa["A"]->max_power_dBm()) {
+            _pa_power_max_dBm = limit_dbm;
+        }
+
+        if (_pa_power_max_dBm != _pa["A"]->max_power_dBm()) {
+            UHD_MSG(status) << "Limiting PA output power to: " << _pa_power_max_dBm << "dBm (" << power_amp::dBm2w(_pa_power_max_dBm) << "W)" << std::endl;
+        }
+    }
+
    ////////////////////////////////////////////////////////////////////
    // create codec control objects
    ////////////////////////////////////////////////////////////////////
@@ -276,9 +388,11 @@ umtrx_impl::umtrx_impl(const device_addr_t &device_addr)
        _tree->create<std::complex<double> >(rx_fe_path / "iq_balance" / "value")
            .subscribe(boost::bind(&rx_frontend_core_200::set_iq_balance, rx_fe, _1))
            .set(std::polar<double>(0.0, 0.0));
+        /*
        _tree->create<std::complex<double> >(tx_fe_path / "dc_offset" / "value")
            .coerce(boost::bind(&tx_frontend_core_200::set_dc_offset, tx_fe, _1))
            .set(std::complex<double>(0.0, 0.0));
+        */
        _tree->create<std::complex<double> >(tx_fe_path / "iq_balance" / "value")
            .subscribe(boost::bind(&tx_frontend_core_200::set_iq_balance, tx_fe, _1))
            .set(std::polar<double>(0.0, 0.0));
@@ -409,9 +523,9 @@ umtrx_impl::umtrx_impl(const device_addr_t &device_addr)

        //sensors -- always say locked
        _tree->create<sensor_value_t>(rx_rf_fe_path / "sensors" / "lo_locked")
-            .set(sensor_value_t("LO", true, "locked", "unlocked"));
+            .publish(boost::bind(&lms6002d_ctrl::get_rx_pll_locked, ctrl));
        _tree->create<sensor_value_t>(tx_rf_fe_path / "sensors" / "lo_locked")
-            .set(sensor_value_t("LO", true, "locked", "unlocked"));
+            .publish(boost::bind(&lms6002d_ctrl::get_tx_pll_locked, ctrl));

        //rx gains
        BOOST_FOREACH(const std::string &name, ctrl->get_rx_gains())
@@ -425,14 +539,33 @@ umtrx_impl::umtrx_impl(const device_addr_t &device_addr)
        }

        //tx gains
-        BOOST_FOREACH(const std::string &name, ctrl->get_tx_gains())
+        if (!_pa[fe_name])
        {
-            _tree->create<meta_range_t>(tx_rf_fe_path / "gains" / name / "range")
-                .publish(boost::bind(&lms6002d_ctrl::get_tx_gain_range, ctrl, name));
+            // Use internal LMS gain control if we don't have a PA
+            BOOST_FOREACH(const std::string &name, ctrl->get_tx_gains())
+            {
+                _tree->create<meta_range_t>(tx_rf_fe_path / "gains" / name / "range")
+                    .publish(boost::bind(&lms6002d_ctrl::get_tx_gain_range, ctrl, name));
+
+                _tree->create<double>(tx_rf_fe_path / "gains" / name / "value")
+                    .coerce(boost::bind(&lms6002d_ctrl::set_tx_gain, ctrl, _1, name))
+                    .set((ctrl->get_tx_gain_range(name).start() + ctrl->get_tx_gain_range(name).stop())/2.0);
+            }
+        } else {
+            // Set LMS internal VGA1 gain to optimal value
+            // VGA2 will be set in the set_tx_power()
+            ctrl->set_tx_gain(UMTRX_VGA1_DEF, "VGA1");
+            _tx_power_range[fe_name] = generate_tx_power_range(fe_name);
+
+            // Use PA control to control output power
+            _tree->create<meta_range_t>(tx_rf_fe_path / "gains" / "PA" / "range")
+                .publish(boost::bind(&umtrx_impl::get_tx_power_range, this, fe_name));
+
+            _tree->create<double>(tx_rf_fe_path / "gains" / "PA" / "value")
+                .coerce(boost::bind(&umtrx_impl::set_tx_power, this, _1, fe_name))
+                // Set default output power to maximum
+                .set(get_tx_power_range(fe_name).stop());

-            _tree->create<double>(tx_rf_fe_path / "gains" / name / "value")
-                .coerce(boost::bind(&lms6002d_ctrl::set_tx_gain, ctrl, _1, name))
-                .set((ctrl->get_tx_gain_range(name).start() + ctrl->get_tx_gain_range(name).stop())/2.0);
        }

        //rx freq
@@ -503,12 +636,19 @@ umtrx_impl::umtrx_impl(const device_addr_t &device_addr)

        //set Tx DC calibration values, which are read from mboard EEPROM
        std::string tx_name = (fe_name=="A")?"tx1":"tx2";
-        const std::string dc_i = _iface->mb_eeprom.get(tx_name+"-vga1-dc-i", "");
-        const std::string dc_q = _iface->mb_eeprom.get(tx_name+"-vga1-dc-q", "");
-        if (not dc_i.empty()) _tree->access<uint8_t>(tx_rf_fe_path / "lms6002d" / "tx_dc_i" / "value")
-            .set(boost::lexical_cast<int>(dc_i));
-        if (not dc_q.empty()) _tree->access<uint8_t>(tx_rf_fe_path / "lms6002d" / "tx_dc_q" / "value")
-            .set(boost::lexical_cast<int>(dc_q));
+        const std::string dc_i_str = _iface->mb_eeprom.get(tx_name+"-vga1-dc-i", "");
+        const std::string dc_q_str = _iface->mb_eeprom.get(tx_name+"-vga1-dc-q", "");
+        double dc_i = dc_i_str.empty() ? 0.0 : dc_offset_int2double(boost::lexical_cast<int>(dc_i_str));
+        double dc_q = dc_q_str.empty() ? 0.0 : dc_offset_int2double(boost::lexical_cast<int>(dc_q_str));
+
+        //plugin dc_offset from lms into the frontend corrections
+        _tree->create<std::complex<double> >(mb_path / "tx_frontends" / fe_name / "dc_offset" / "value")
+            .publish(boost::bind(&umtrx_impl::get_dc_offset_correction, this, fe_name))
+            .subscribe(boost::bind(&umtrx_impl::set_dc_offset_correction, this, fe_name, _1))
+            .set(std::complex<double>(dc_i, dc_q));
+
+        // Alias diversity switch control from mb_path
+        property_alias<bool>(_tree, mb_path / "divsw"+(fe_name=="A"?"1":"2"), rx_rf_fe_path / "diversity");
    }

    //set TCXO DAC calibration value, which is read from mboard EEPROM
@@ -549,10 +689,15 @@ umtrx_impl::umtrx_impl(const device_addr_t &device_addr)

    _tree->access<std::string>(mb_path / "clock_source" / "value").set("internal");
    _tree->access<std::string>(mb_path / "time_source" / "value").set("none");
+
+    //create status monitor and client handler
+    this->status_monitor_start(device_addr);
 }

 umtrx_impl::~umtrx_impl(void)
 {
+    this->status_monitor_stop();
+
    BOOST_FOREACH(const std::string &fe_name, _lms_ctrl.keys())
    {
        lms6002d_ctrl::sptr ctrl = _lms_ctrl[fe_name];
@@ -565,15 +710,105 @@ umtrx_impl::~umtrx_impl(void)
    }
 }

+int umtrx_impl::volt_to_dcdc_r(double v)
+{
+    if (v <= _dcdc_val_to_volt[0])
+        return 0;
+    else if (v >= _dcdc_val_to_volt[255])
+        return 255;
+    else
+        return std::lower_bound(_dcdc_val_to_volt.begin(), _dcdc_val_to_volt.end(), v) - _dcdc_val_to_volt.begin();
+}
+
 void umtrx_impl::set_pa_dcdc_r(uint8_t val)
 {
+    boost::recursive_mutex::scoped_lock l(_i2c_mutex);
    // AD5245 control
    if (_hw_rev >= UMTRX_VER_2_3_1)
+    {
+        _pa_dcdc_r = val;
        _iface->write_i2c(BOOST_BINARY(0101100), boost::assign::list_of(0)(val));
+    }
+}
+
+uhd::gain_range_t umtrx_impl::generate_tx_power_range(const std::string &which) const
+{
+    // Native PA range plus LMS6 VGA2 control. We keep LMS6 VGA1 constant to
+    // maintain high signal quality.
+    uhd::gain_range_t pa_range = generate_pa_power_range(which);
+//    UHD_MSG(status) << "Original PA output power range: " << pa_range.to_pp_string() << std::endl;
+    uhd::gain_range_t vga_range(pa_range.start() - (UMTRX_VGA2_DEF-UMTRX_VGA2_MIN), pa_range.start()-1, 1.0);
+    uhd::gain_range_t res_range(vga_range);
+    res_range.insert(res_range.end(), pa_range.begin(), pa_range.end());
+//    UHD_MSG(status) << "Generated Tx output power range: " << res_range.to_pp_string() << std::endl;
+    return res_range;
+}
+
+uhd::gain_range_t umtrx_impl::generate_pa_power_range(const std::string &which) const
+{
+    double min_power = _pa[which]->min_power_dBm();
+    double max_power = _pa_power_max_dBm;
+    return uhd::gain_range_t(min_power, max_power, 0.1);
+}
+
+const uhd::gain_range_t &umtrx_impl::get_tx_power_range(const std::string &which) const
+{
+    return _tx_power_range[which];
+}
+
+double umtrx_impl::set_tx_power(double power, const std::string &which)
+{
+    double min_pa_power = _pa[which]->min_power_dBm();
+    double actual_power;
+
+    if (power >= min_pa_power)
+    {
+        UHD_MSG(status) << "Setting Tx power using PA (VGA2=" << UMTRX_VGA2_DEF << ", PA=" << power << ")" << std::endl;
+        // Set VGA2 to the recommended value and use PA to control Tx power
+        _lms_ctrl[which]->set_tx_gain(UMTRX_VGA2_DEF, "VGA2");
+        actual_power = set_pa_power(power, which);
+    } else {
+        double vga2_gain = UMTRX_VGA2_DEF - (min_pa_power-power);
+        UHD_MSG(status) << "Setting Tx power using VGA2 (VGA2=" << vga2_gain << ", PA=" << min_pa_power << ")" << std::endl;
+        // Set PA output power to minimum and use VGA2 to control Tx power
+        actual_power = _lms_ctrl[which]->set_tx_gain(vga2_gain, "VGA2");
+        actual_power = set_pa_power(min_pa_power, which) - (UMTRX_VGA2_DEF-actual_power);
+    }
+
+    return actual_power;
+}
+
+double umtrx_impl::set_pa_power(double power, const std::string &which)
+{
+    boost::recursive_mutex::scoped_lock l(_i2c_mutex);
+    // TODO:: Use DCDC bypass for maximum output power
+    // TODO:: Limit output power for UmSITE-TM3
+
+    // Find voltage required for the requested output power
+    double v = _pa[which]->dBm2v(power);
+    uint8_t dcdc_val = volt_to_dcdc_r(v);
+    // Set the value
+    set_nlow(true);
+    set_pa_dcdc_r(dcdc_val);
+
+    // Check what power do we actually have by reading the DCDC voltage
+    // and converting it to the PA power
+    double v_actual = read_dc_v("DCOUT").to_real();
+    double power_actual = _pa[which]->v2dBm(v_actual);
+
+    // TODO:: Check that power is actually there by reading VSWR sensor.
+
+    UHD_MSG(status) << "Setting PA power: Requested: " << power << "dBm = " << power_amp::dBm2w(power) << "W "
+                    << "(" << v << "V dcdc_r=" << int(dcdc_val) << "). "
+                    << "Actual: " << power_actual << "dBm = " << power_amp::dBm2w(power_actual) <<"W "
+                    << "(" << v_actual << "V)" << std::endl;
+
+    return power_actual;
 }

 void umtrx_impl::set_mb_eeprom(const uhd::i2c_iface::sptr &iface, const uhd::usrp::mboard_eeprom_t &eeprom)
 {
+    boost::recursive_mutex::scoped_lock l(_i2c_mutex);
    store_umtrx_eeprom(eeprom, *iface);
 }

@@ -613,8 +848,32 @@ uint16_t umtrx_impl::get_tcxo_dac(const umtrx_iface::sptr &iface){
    return (uint16_t)val;
 }

+std::complex<double> umtrx_impl::get_dc_offset_correction(const std::string &which) const
+{
+    return std::complex<double>(
+        dc_offset_int2double(_lms_ctrl[which]->get_tx_vga1dc_i_int()),
+        dc_offset_int2double(_lms_ctrl[which]->get_tx_vga1dc_q_int()));
+}
+
+void umtrx_impl::set_dc_offset_correction(const std::string &which, const std::complex<double> &corr)
+{
+    _lms_ctrl[which]->_set_tx_vga1dc_i_int(dc_offset_double2int(corr.real()));
+    _lms_ctrl[which]->_set_tx_vga1dc_q_int(dc_offset_double2int(corr.imag()));
+}
+
+double umtrx_impl::dc_offset_int2double(uint8_t corr)
+{
+    return (corr-128)/128.0;
+}
+
+uint8_t umtrx_impl::dc_offset_double2int(double corr)
+{
+    return (int)(corr*128 + 128.5);
+}
+
 uhd::sensor_value_t umtrx_impl::read_temp_c(const std::string &which)
 {
+    boost::recursive_mutex::scoped_lock l(_i2c_mutex);
    double temp = (which == "A") ? _temp_side_a.get_temp() :
                                   _temp_side_b.get_temp();
    return uhd::sensor_value_t("Temp"+which, temp, "C");
@@ -622,6 +881,7 @@ uhd::sensor_value_t umtrx_impl::read_temp_c(const std::string &which)

 uhd::sensor_value_t umtrx_impl::read_pa_v(const std::string &which)
 {
+    boost::recursive_mutex::scoped_lock l(_i2c_mutex);
    unsigned i;
    for (i = 0; i < 4; i++) {
        if (which == power_sensors[i])
@@ -637,6 +897,7 @@ uhd::sensor_value_t umtrx_impl::read_pa_v(const std::string &which)

 uhd::sensor_value_t umtrx_impl::read_dc_v(const std::string &which)
 {
+    boost::recursive_mutex::scoped_lock l(_i2c_mutex);
    unsigned i;
    for (i = 0; i < 4; i++) {
        if (which == dc_sensors[i])
@@ -782,14 +1043,11 @@ void umtrx_impl::set_nlow(bool en)
    _pa_nlow = en; commit_pa_state();
 }

-void umtrx_impl::set_divsw1(bool en)
+void umtrx_impl::set_diversity(bool en, int chan)
 {
-    _iface->poke32(U2_REG_SR_ADDR(SR_DIVSW+0), (en) ? 1 : 0);
-}
-
-void umtrx_impl::set_divsw2(bool en)
-{
-    _iface->poke32(U2_REG_SR_ADDR(SR_DIVSW+1), (en) ? 1 : 0);
+    // chan 0 has inversed switch polarity
+    // chan 1 has straight switch polarity
+    _iface->poke32(U2_REG_SR_ADDR(SR_DIVSW+chan), (en != (chan==1)) ? 0 : 1);
 }

 const char* umtrx_impl::get_hw_rev() const
@@ -803,4 +1061,3 @@ const char* umtrx_impl::get_hw_rev() const
    default:               return "[unknown]";
    }
 }
-
--- a/host/umtrx_impl.hpp
+++ b/host/umtrx_impl.hpp
@@ -30,6 +30,7 @@
 #include "cores/time64_core_200.hpp"
 #include "ads1015_ctrl.hpp"
 #include "tmp102_ctrl.hpp"
+#include "power_amp.hpp"
 #include <uhd/usrp/mboard_eeprom.hpp>
 #include <uhd/property_tree.hpp>
 #include <uhd/device.hpp>
@@ -47,6 +48,8 @@
 #include <uhd/transport/udp_simple.hpp>
 #include <uhd/transport/udp_zero_copy.hpp>
 #include <uhd/transport/bounded_buffer.hpp>
+#include <boost/thread/recursive_mutex.hpp>
+#include <boost/property_tree/json_parser.hpp>
 #include <uhd/types/ranges.hpp>
 #include <uhd/exception.hpp>
 #include <uhd/utils/static.hpp>
@@ -57,6 +60,7 @@
 #include <boost/weak_ptr.hpp>
 #include <boost/asio.hpp>
 #include <boost/thread/mutex.hpp>
+#include <uhd/utils/tasks.hpp>


 // Halfthe size of USRP2 SRAM, because we split the same SRAM into buffers for two Tx channels instead of one.
@@ -119,10 +123,15 @@ private:
    unsigned _pll_div;
    const char* get_hw_rev() const;

-    //communication interfaces
-    std::string _device_ip_addr;
-    umtrx_iface::sptr _iface;
-    umtrx_fifo_ctrl::sptr _ctrl;
+    // Optimal VGA settings for GSM signal, according to our measurements.
+    static const int UMTRX_VGA1_DEF;
+    static const int UMTRX_VGA2_DEF;
+    static const int UMTRX_VGA2_MIN;
+
+    // Conversion table for converting DCDC_R values to actual voltages.
+    static const std::vector<double> _dcdc_val_to_volt;
+    // Find a dcdc_r value to approximate requested Vout voltage
+    static int volt_to_dcdc_r(double v);

    ads1015_ctrl _sense_pwr;
    ads1015_ctrl _sense_dc;
@@ -133,9 +142,21 @@ private:
    bool _pa_nlow;
    bool _pa_en1;
    bool _pa_en2;
+    uint8_t _pa_dcdc_r;
+    double _pa_power_max_dBm; // Artifical PA output power limit, dBm
+
+    void set_pa_dcdc_r(uint8_t val);
+    uint8_t get_pa_dcdc_r() const {return _pa_dcdc_r;}
+
+    //communication interfaces
+    std::string _device_ip_addr;
+    umtrx_iface::sptr _iface;
+    umtrx_fifo_ctrl::sptr _ctrl;

    //controls for perifs
    uhd::dict<std::string, lms6002d_ctrl::sptr> _lms_ctrl;
+    uhd::dict<std::string, uhd::power_amp::sptr> _pa;
+    uhd::dict<std::string, uhd::gain_range_t> _tx_power_range; // Tx output power range

    //control for FPGA cores
    std::vector<rx_frontend_core_200::sptr> _rx_fes;
@@ -145,7 +166,6 @@ private:
    time64_core_200::sptr _time64;

    //helper routines
-    void set_pa_dcdc_r(uint8_t val);
    void set_mb_eeprom(const uhd::i2c_iface::sptr &, const uhd::usrp::mboard_eeprom_t &);
    double get_master_clock_rate(void) const { return 26e6; }
    double get_master_dsp_rate(void) const { return get_master_clock_rate()/2; }
@@ -165,15 +185,39 @@ private:
    void set_enpa1(bool en);
    void set_enpa2(bool en);
    void set_nlow(bool en);
-    void set_divsw1(bool en);
-    void set_divsw2(bool en);
+    void set_diversity(bool en, int chan);
+    uhd::gain_range_t generate_tx_power_range(const std::string &which) const;
+    uhd::gain_range_t generate_pa_power_range(const std::string &which) const;
+    const uhd::gain_range_t &get_tx_power_range(const std::string &which) const;
+    double set_tx_power(double power, const std::string &which);
+    double set_pa_power(double power, const std::string &which);
    uint16_t get_tcxo_dac(const umtrx_iface::sptr &);
    uhd::transport::zero_copy_if::sptr make_xport(const size_t which, const uhd::device_addr_t &args);
+    std::complex<double> get_dc_offset_correction(const std::string &which) const;
+    void set_dc_offset_correction(const std::string &which, const std::complex<double> &corr);
+
+    static double dc_offset_int2double(uint8_t corr);
+    static uint8_t dc_offset_double2int(double corr);

    //temp sensors read values in degC
    uhd::sensor_value_t read_temp_c(const std::string &which);
    uhd::sensor_value_t read_pa_v(const std::string &which);
    uhd::sensor_value_t read_dc_v(const std::string &which);
+    boost::recursive_mutex _i2c_mutex;
+
+    //status monitoring
+    void status_monitor_start(const uhd::device_addr_t &device_addr);
+    void status_monitor_stop(void);
+    uhd::task::sptr _status_monitor_task;
+    void status_monitor_handler(void);
+
+    //tcp query server
+    uhd::task::sptr _server_query_task;
+    void server_query_handler(void);
+    boost::asio::io_service _server_query_io_service;
+    boost::shared_ptr<boost::asio::ip::tcp::acceptor> _server_query_tcp_acceptor;
+    void client_query_handle(boost::shared_ptr<boost::asio::ip::tcp::socket>);
+    void client_query_handle1(const boost::property_tree::ptree &request, boost::property_tree::ptree &response);

    //streaming
    std::vector<boost::weak_ptr<uhd::rx_streamer> > _rx_streamers;
--- a/host/umtrx_monitor.cpp
+++ b/host/umtrx_monitor.cpp
@@ -0,0 +1,246 @@
+//
+// Copyright 2015-2015 Fairwaves LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#include "umtrx_impl.hpp"
+#include <uhd/utils/msg.hpp>
+#include <uhd/types/sensors.hpp>
+#include <uhd/types/ranges.hpp>
+#include <boost/asio.hpp>
+
+using namespace uhd;
+using namespace uhd::usrp;
+namespace asio = boost::asio;
+
+/*!
+ * Querying sensors using the status monitor server.
+ * Requests are encoded in JSON and end in a newline.
+ * Responses are encoded in JSON and end in a newline.
+ *
+ * Start UmTRX driver with status_port set in args
+ * ./some_application --args="status_port=12345"
+ *
+ * import json
+ * import socket
+ * s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
+ * s.connect(("localhost", 12345))
+ * f = s.makefile() #gives us readline()
+ *
+ * #list branches in the property tree
+ * s.send(json.dumps(dict(action='LIST', path='/mboards/0/sensors'))+'\n')
+ * print json.loads(f.readline())
+ * {u'result': [u'tempA']}
+ *
+ * #check if the specified path exists
+ * s.send(json.dumps(dict(action='HAS', path='/mboards/0/sensors/tempA'))+'\n')
+ * print json.loads(f.readline())
+ * {u'result': u'true'}
+ *
+ * #get the value of a tree entry, types can be BOOL, INT, DOUBLE, SENSOR, RANGE
+ * s.send(json.dumps(dict(action='GET', path='/mboards/0/sensors/tempA', type='SENSOR'))+'\n')
+ * print json.loads(f.readline())
+ * {u'result': {u'unit': u'C', u'name': u'TempA', u'value': u'61.625000'}}
+ *
+ * #set the value of a tree entry, types can be BOOL, INT, DOUBLE
+ * s.send(json.dumps(dict(action='SET', path='/mboards/0/dboards/A/rx_frontends/0/freq/value', type='DOUBLE', value=1e9))+'\n')
+ * print json.loads(f.readline())
+ * {} #empty response means no error
+ */
+
+void umtrx_impl::status_monitor_start(const uhd::device_addr_t &device_addr)
+{
+    if (device_addr.has_key("status_port"))
+    {
+        UHD_MSG(status) << "Creating TCP monitor on port " << device_addr.get("status_port") << std::endl;
+        _server_query_tcp_acceptor.reset(new asio::ip::tcp::acceptor(
+            _server_query_io_service, asio::ip::tcp::endpoint(asio::ip::tcp::v4(), device_addr.cast<int>("status_port", 0))));
+        _server_query_task = task::make(boost::bind(&umtrx_impl::server_query_handler, this));
+    }
+    _status_monitor_task = task::make(boost::bind(&umtrx_impl::status_monitor_handler, this));
+}
+
+void umtrx_impl::status_monitor_stop(void)
+{
+    _status_monitor_task.reset();
+    _server_query_task.reset();
+}
+
+static bool wait_read_sockfd(const int sockfd, const size_t timeoutMs)
+{
+    //setup timeval for timeout
+    timeval tv;
+    tv.tv_sec = 0;
+    tv.tv_usec = timeoutMs*1000;
+
+    //setup rset for timeout
+    fd_set rset;
+    FD_ZERO(&rset);
+    FD_SET(sockfd, &rset);
+
+    //call select with timeout on receive socket
+    return ::select(sockfd+1, &rset, NULL, NULL, &tv) > 0;
+}
+
+void umtrx_impl::status_monitor_handler(void)
+{
+    //TODO read the sensors and react...
+    //read_dc_v, etc...
+    //UHD_MSG(status) << this->read_temp_c("A").to_pp_string() << std::endl;
+
+    //TODO shutdown frontend when temp > thresh
+    //ctrl->set_rx_enabled(false);
+    //ctrl->set_tx_enabled(false);
+
+    //this sleep defines the polling time between status checks
+    //when the handler completes, it will be called again asap
+    //if the task is canceled, this sleep in interrupted for exit
+    boost::this_thread::sleep(boost::posix_time::milliseconds(1500));
+}
+
+void umtrx_impl::server_query_handler(void)
+{
+    //accept the client socket (timeout is 100 ms, task is called again)
+    if (not wait_read_sockfd(_server_query_tcp_acceptor->native(), 100)) return;
+    boost::shared_ptr<asio::ip::tcp::socket> socket(new asio::ip::tcp::socket(_server_query_io_service));
+    _server_query_tcp_acceptor->accept(*socket);
+
+    //create a new thread to handle the client
+    boost::thread handler(boost::bind(&umtrx_impl::client_query_handle, this, socket));
+    handler.detach();
+}
+
+void umtrx_impl::client_query_handle(boost::shared_ptr<boost::asio::ip::tcp::socket> socket)
+{
+    while (not boost::this_thread::interruption_requested())
+    {
+        boost::property_tree::ptree request, response;
+
+        //receive the request in JSON markup
+        boost::asio::streambuf requestBuff;
+        try
+        {
+            boost::asio::read_until(*socket, requestBuff, "\n");
+            std::istream is(&requestBuff);
+            boost::property_tree::read_json(is, request);
+        }
+        catch (const std::exception &ex)
+        {
+            if (requestBuff.size() == 0) return; //client ended
+            response.put("error", "request parser error: " + std::string(ex.what()));
+        }
+
+        //handle the request
+        try
+        {
+            this->client_query_handle1(request, response);
+        }
+        catch (const std::exception &ex)
+        {
+            response.put("error", "failed to handle request: " + std::string(ex.what()));
+        }
+
+        //send the response
+        boost::asio::streambuf responseBuff;
+        std::ostream os(&responseBuff);
+        try
+        {
+            boost::property_tree::write_json(os, response, false/*not pretty required*/);
+            boost::asio::write(*socket, responseBuff);
+        }
+        catch (const std::exception &ex)
+        {
+            UHD_MSG(error) << "client_query_handle send response failed, exit client thread: " << ex.what() << std::endl;
+            return;
+        }
+    }
+}
+
+void umtrx_impl::client_query_handle1(const boost::property_tree::ptree &request, boost::property_tree::ptree &response)
+{
+    const std::string action = request.get("action", "");
+    const std::string path = request.get("path", "");
+    if (response.count("error") != 0)
+    {
+        //already in error
+    }
+    else if (path.empty())
+    {
+        response.put("error", "path field not specified");
+    }
+    else if (action.empty())
+    {
+        response.put("error", "action field not specified: GET, SET, HAS, LIST");
+    }
+    else if (action == "GET")
+    {
+        const std::string type = request.get("type", "");
+        if (type.empty()) response.put("error", "type field not specified: BOOL, INT, DOUBLE, SENSOR, RANGE");
+        else if (type == "BOOL") response.put("result", _tree->access<bool>(path).get());
+        else if (type == "INT") response.put("result", _tree->access<int>(path).get());
+        else if (type == "DOUBLE") response.put("result", _tree->access<double>(path).get());
+        else if (type == "SENSOR")
+        {
+            boost::property_tree::ptree result;
+            const sensor_value_t sensor = _tree->access<sensor_value_t>(path).get();
+            result.put("name", sensor.name);
+            result.put("value", sensor.value);
+            result.put("unit", sensor.unit);
+            response.add_child("result", result);
+        }
+        else if (type == "RANGE")
+        {
+            boost::property_tree::ptree result;
+            BOOST_FOREACH(const range_t &range, _tree->access<meta_range_t>(path).get())
+            {
+                boost::property_tree::ptree rangeData;
+                rangeData.put("start", range.start());
+                rangeData.put("stop", range.stop());
+                rangeData.put("step", range.step());
+                result.push_back(std::make_pair("", rangeData));
+            }
+            response.add_child("result", result);
+        }
+        else response.put("error", "unknown type: " + type);
+    }
+    else if (action == "SET")
+    {
+        const std::string type = request.get("type", "");
+        if (type.empty()) response.put("error", "type field not specified: BOOL, INT, DOUBLE");
+        else if (type == "BOOL") _tree->access<bool>(path).set(request.get<bool>("value"));
+        else if (type == "INT") _tree->access<int>(path).set(request.get<int>("value"));
+        else if (type == "DOUBLE") _tree->access<double>(path).set(request.get<double>("value"));
+        else response.put("error", "unknown type: " + type);
+    }
+    else if (action == "HAS")
+    {
+        response.put("result", _tree->exists(path));
+    }
+    else if (action == "LIST")
+    {
+        boost::property_tree::ptree result;
+        BOOST_FOREACH(const std::string &branchName, _tree->list(path))
+        {
+            boost::property_tree::ptree branchData;
+            branchData.put("", branchName);
+            result.push_back(std::make_pair("", branchData));
+        }
+        response.add_child("result", result);
+    }
+    else
+    {
+        response.put("error", "unknown action: " + action);
+    }
+}
--- a/host/umtrx_version.in.hpp
+++ b/host/umtrx_version.in.hpp
@@ -0,0 +1 @@
+#define UMTRX_VERSION "@UMTRX_VERSION@"
--- a/host/usrp2/fw_common.h
+++ b/host/usrp2/fw_common.h
@@ -32,7 +32,7 @@ extern "C" {
 //fpga and firmware compatibility numbers
 #define USRP2_FPGA_COMPAT_NUM 9
 #define USRP2_FW_COMPAT_NUM 12
-#define USRP2_FW_VER_MINOR 1
+#define USRP2_FW_VER_MINOR 2

 //used to differentiate control packets over data port
 #define USRP2_INVALID_VRT_HEADER 0
--- a/host/utils/CMakeLists.txt
+++ b/host/utils/CMakeLists.txt
@@ -3,6 +3,9 @@
 ########################################################################
 INSTALL(PROGRAMS
    umtrx_net_burner
+    umtrx_nmea
+    umtrx_gps_coord
+    umtrx_auto_calibration
    DESTINATION bin
 )

@@ -18,6 +21,10 @@ add_executable(umtrx_cal_tx_dc_offset umtrx_cal_tx_dc_offset.cpp)
 target_link_libraries(umtrx_cal_tx_dc_offset ${UMTRX_LIBRARIES})
 install(TARGETS umtrx_cal_tx_dc_offset DESTINATION bin)

+add_executable(umtrx_cal_tx_iq_balance umtrx_cal_tx_iq_balance.cpp)
+target_link_libraries(umtrx_cal_tx_iq_balance ${UMTRX_LIBRARIES})
+install(TARGETS umtrx_cal_tx_iq_balance DESTINATION bin)
+
 add_executable(umtrx_pa_ctrl umtrx_pa_ctrl.cpp)
 target_link_libraries(umtrx_pa_ctrl ${UMTRX_LIBRARIES})
 install(TARGETS umtrx_pa_ctrl DESTINATION bin)
--- a/host/utils/plot_csv_tx_dc_cal.py
+++ b/host/utils/plot_csv_tx_dc_cal.py
@@ -20,8 +20,8 @@ def plot_csv(file_path):
            if not i: continue #skip titles
            tx_lo, icor, qcor, meadured, delta = row
            tx_lo = float(tx_lo)/1e9
-            icor = int(icor)
-            qcor = int(qcor)
+            icor = float(icor)
+            qcor = float(qcor)
            freq_vals.append(tx_lo)
            dc_i_vals.append(icor)
            dc_q_vals.append(qcor)
@@ -34,7 +34,7 @@ def plot_csv(file_path):
    plt.figure(1)
    plt.subplot(311)
    plt.plot(freq_vals, dc_i_vals, freq_vals, dc_q_vals,)
-    plt.ylim(0, 250)
+    #plt.ylim(0, 250)
    plt.title("Freq (GHz) vs raw IQ corrections")
    #plt.xlabel('Freq (GHz)')
    plt.grid(True)
@@ -45,7 +45,7 @@ def plot_csv(file_path):
    dc_i_std = [np.std(dc_i_vals_per_freq[f]) for f in freqs]
    dc_q_std = [np.std(dc_q_vals_per_freq[f]) for f in freqs]
    plt.plot(freqs, dc_i_std, freqs, dc_q_std)
-    plt.ylim(0, 150)
+    #plt.ylim(0, 150)
    plt.title("Freq (GHz) vs stddev IQ corrections")
    #plt.xlabel('Freq (GHz)')
    plt.grid(True)
@@ -70,7 +70,7 @@ def plot_csv(file_path):
    dc_i_avg = [np.mean(dc_i_vals_per_freq[f]) for f in freqs]
    dc_q_avg = [np.mean(dc_q_vals_per_freq[f]) for f in freqs]
    plt.plot(freqs, dc_i_avg, freqs, dc_q_avg)
-    plt.ylim(0, 250)
+    #plt.ylim(0, 250)
    plt.title("Freq (GHz) vs averaged IQ corrections")
    #plt.xlabel('Freq (GHz)')
    plt.grid(True)
--- a/host/utils/umtrx_auto_calibration
+++ b/host/utils/umtrx_auto_calibration
@@ -0,0 +1,134 @@
+#!/bin/sh
+
+if [ "$#" -lt "1" ] ; then
+  echo "Automatic calibration of an UmTRX for a set of given presets (bands)."
+  echo
+  echo "Usage:"
+  echo "  umtrx_cal <preset> [<preset>] [<preset>] ..."
+  echo
+  echo "  preset - GSM850, EGSM900 (same as GSM900), GSM1800 (same as DCS1800), GSM1900 (same as PCS1900)."
+  echo
+  echo "Calibrations to be performed:"
+  echo "  - Tx DC offset calibration"
+  echo "  - Tx IQ balance calibration"
+  echo
+  echo "The result of the calibration is stored in the DIR/.uhd/cal/ directory. DIR is one of the \$APPDATA, \$HOME and /tmp,"
+  echo "whichever is defined. Make sure you run calibration from the same user as the one who runs applications or define"
+  echo "\$APPDATA or \$HOME appropriately. Calibration files will be loaded by the application automatically on startup."
+  echo "Old calibration files are renamed when you run a calibration to avoid overwriting."
+  echo
+  echo "Calibration is permanent and only depends on temperature. If the temperature of the system is stable, you need to"
+  echo "run the calibration only once."
+  exit 1
+fi
+
+presets=$*
+
+sides="A B"
+uhd_args="--args=fifo_ctrl_window=0"
+report=""
+
+run_cal() {
+  what=$1 ; shift
+  freq_start=$1 ; shift
+  freq_stop=$1 ; shift
+  other_args=$*
+
+  freq_step=$(python -c "print $freq_stop - $freq_start if $freq_stop != $freq_start else 1e3")
+
+  if [ "$what" = "dc" ] ; then
+    cmd="umtrx_cal_tx_dc_offset"
+  elif [ "$what" = "iq" ] ; then
+    cmd="umtrx_cal_tx_iq_balance"
+  else
+    echo "Unknown calibration type \"$what\""
+    return 1
+  fi
+
+  for side in $sides ; do
+
+    echo
+    echo "------------------------------------------------------------------"
+    echo "       Calibrating $what from $freq_start to $freq_stop for side $side"
+    echo "------------------------------------------------------------------"
+    echo
+
+    res=255
+    i=0
+    while [ $i -lt 10 -a $res -ne 0 ] ; do
+      i=$(expr $i + 1)
+      cmd_full="$cmd $uhd_args --freq_start $freq_start --freq_stop $freq_stop --freq_step $freq_step --which $side $other_args"
+      echo $cmd_full
+      $cmd_full
+      res=$(echo $?)
+    done
+
+    text_res="Calibration type $what side $side from $freq_start to $freq_stop:"
+    if [ $res -ne 0 ] ; then
+      text_res="$text_res FAIL"
+    else
+      text_res="$text_res SUCCESS"
+    fi
+
+    echo
+    echo "$text_res"
+    echo
+
+    report="$report$text_res\n"
+  done
+}
+
+
+run_preset() {
+  preset=$1
+
+  echo
+  echo "===================================================================="
+  echo "                       Running preset $preset"
+  echo "===================================================================="
+  echo
+
+  case $preset in
+  GSM850)
+    run_cal dc 869e6 894e6
+    # The band completely falls into the 810-930 VCO range
+    run_cal iq 869e6 894e6
+    ;;
+
+  GSM900|EGSM900)
+    run_cal dc 925e6 960e6
+    # The band spans VCO ranges 810-930 and 930-11425
+    run_cal iq 925e6 930e6
+    run_cal iq 930.001e6 960e6 --append
+    ;;
+
+  GSM1800|DCS1800)
+    run_cal dc 1805e6 1880e6
+    # The band spans VCO ranges 1620-1860 and 1860-2285
+    run_cal iq 1805e6 1860e6
+    run_cal iq 1860.001e6 1880e6 --append
+    ;;
+
+  GSM1900|PCS1900)
+    run_cal dc 1930e6 1990e6
+    # The band completely falls into the 1860-2285 VCO range
+    run_cal iq 1930e6 1990e6
+    ;;
+
+  *)
+    echo "Unknown preset"
+    exit 2
+    ;;
+  esac
+}
+
+for preset in $presets ; do
+  run_preset $preset
+done
+
+echo
+echo "===================================================================="
+echo "                               Result"
+echo "===================================================================="
+echo
+echo "$report"
--- a/host/utils/umtrx_cal_tx_dc_offset.cpp
+++ b/host/utils/umtrx_cal_tx_dc_offset.cpp
@@ -1,6 +1,6 @@
 //
 // Copyright 2010 Ettus Research LLC
-// Copyright 2012 Fairwaves LLC
+// Copyright 2012-1015 Fairwaves, Inc
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
@@ -17,16 +17,10 @@
 //

 #include "usrp_cal_utils.hpp"
-#include <uhd/utils/thread_priority.hpp>
 #include <uhd/utils/safe_main.hpp>
-#include <uhd/utils/paths.hpp>
-#include <uhd/utils/algorithm.hpp>
-#include <uhd/usrp/multi_usrp.hpp>
 #include <boost/program_options.hpp>
 #include <boost/format.hpp>
-#include <boost/thread/thread.hpp>
 #include <boost/math/special_functions/round.hpp>
-#include <boost/random.hpp>
 #include <iostream>
 #include <complex>
 #include <cmath>
@@ -35,77 +29,271 @@
 namespace po = boost::program_options;

 /***********************************************************************
- * Transmit thread
+ * Calibration utility class
 **********************************************************************/
-static void tx_thread(uhd::usrp::multi_usrp::sptr usrp, const double tx_wave_freq, const double tx_wave_ampl){
-    uhd::set_thread_priority_safe();
+class dc_cal_t {
+public:
+    dc_cal_t(uhd::property<uint8_t> &dc_i_prop, uhd::property<uint8_t> &dc_q_prop,
+             uhd::rx_streamer::sptr rx_stream,
+             const size_t nsamps,
+             double bb_dc_freq,
+             double rx_rate,
+             int verbose,
+             bool debug_raw_data,
+             int init_dc_i=128, int init_dc_q=128);

-    //create a transmit streamer
-    uhd::stream_args_t stream_args("fc32"); //complex floats
-    uhd::tx_streamer::sptr tx_stream = usrp->get_tx_stream(stream_args);
+    double init();
+    void run_q(int dc_q);
+    void run_i(int dc_i);
+    void run_iq(int dc_i, int dc_q);

-    //setup variables and allocate buffer
-    uhd::tx_metadata_t md;
-    md.has_time_spec = false;
-    std::vector<samp_type> buff(tx_stream->get_max_num_samps()*10);
+    void set_dc_i(double i) {prop_set_check(_dc_i_prop, i);}
+    void set_dc_q(double q) {prop_set_check(_dc_q_prop, q);}
+    void set_dc_i_best() {set_dc_i(_best_dc_i);}
+    void set_dc_q_best() {set_dc_q(_best_dc_q);}

-    //values for the wave table lookup
-    size_t index = 0;
-    const double tx_rate = usrp->get_tx_rate();
-    const size_t step = boost::math::iround(wave_table_len * tx_wave_freq/tx_rate);
-    wave_table table(tx_wave_ampl);
+    double get_lowest_offset() const {return _lowest_offset;}
+    int get_best_dc_i() const {return _best_dc_i;}
+    int get_best_dc_q() const {return _best_dc_q;}

-    //fill buff and send until interrupted
-    while (not boost::this_thread::interruption_requested()){
-        for (size_t i = 0; i < buff.size(); i++){
-            buff[i] = table(index += step);
-            buff[i] = samp_type(0, 0); //using no-power transmit to cal with
+protected:
+    double _lowest_offset;
+    int _best_dc_i;
+    int _best_dc_q;
+    uhd::property<uint8_t> &_dc_i_prop;
+    uhd::property<uint8_t> &_dc_q_prop;
+
+    uhd::rx_streamer::sptr _rx_stream;
+    std::vector<samp_type> _buff;
+    const size_t _nsamps;
+    double _bb_dc_freq;
+    double _rx_rate;
+    int _verbose;
+    bool _debug_raw_data;
+
+    void prop_set_check(uhd::property<uint8_t> &prop, uint8_t val);
+
+    double get_dbrms();
+    bool run_x();
+};
+
+dc_cal_t::dc_cal_t(uhd::property<uint8_t> &dc_i_prop, uhd::property<uint8_t> &dc_q_prop,
+                   uhd::rx_streamer::sptr rx_stream,
+                   const size_t nsamps,
+                   double bb_dc_freq,
+                   double rx_rate,
+                   int verbose,
+                   bool debug_raw_data,
+                   int init_dc_i,
+                   int init_dc_q)
+    : _best_dc_i(init_dc_i), _best_dc_q(init_dc_q)
+    , _dc_i_prop(dc_i_prop), _dc_q_prop(dc_q_prop)
+    , _rx_stream(rx_stream)
+    , _nsamps(nsamps)
+    , _bb_dc_freq(bb_dc_freq)
+    , _rx_rate(rx_rate)
+    , _verbose(verbose)
+    , _debug_raw_data(debug_raw_data)
+{
+}
+
+double dc_cal_t::init()
+{
+    set_dc_i_best();
+    set_dc_q_best();
+
+    //get the DC offset tone size
+    _lowest_offset = get_dbrms();
+
+    if (_verbose) printf("initial_dc_dbrms = %2.0f dB\n", _lowest_offset);
+    if (_debug_raw_data) write_samples_to_file(_buff, "initial_samples.dat");
+
+    return _lowest_offset;
+}
+
+void dc_cal_t::run_q(int dc_q)
+{
+    if (_verbose) printf("      dc_q = %d", dc_q);
+    set_dc_q(dc_q);
+    if (run_x())
+        _best_dc_q = dc_q;
+}
+
+void dc_cal_t::run_i(int dc_i)
+{
+    if (_verbose) printf("      dc_i = %d", dc_i);
+    set_dc_i(dc_i);
+    if (run_x())
+        _best_dc_i = dc_i;
+}
+
+void dc_cal_t::run_iq(int dc_i, int dc_q)
+{
+    if (_verbose) printf("      dc_i = %d dc_q = %d", dc_i, dc_q);
+    set_dc_i(dc_i);
+    set_dc_q(dc_q);
+    if (run_x()) {
+        _best_dc_i = dc_i;
+        _best_dc_q = dc_q;
+    }
+}
+
+void dc_cal_t::prop_set_check(uhd::property<uint8_t> &prop, uint8_t val)
+{
+    prop.set(val);
+    uint8_t val_read = prop.get();
+    if (val_read != val)
+        throw std::runtime_error(
+            str(boost::format("Calibration property sets incorrectly. Requested %d, read back %d")
+                          % int(val) % int(val_read)));
+}
+
+double dc_cal_t::get_dbrms()
+{
+    //receive some samples
+    capture_samples(_rx_stream, _buff, _nsamps);
+    //calculate dB rms
+    return compute_tone_dbrms(_buff, _bb_dc_freq/_rx_rate);
+}
+
+bool dc_cal_t::run_x()
+{
+    bool better = false;
+
+    //get the DC offset tone size
+    const double dc_dbrms = get_dbrms();
+    if (_verbose) printf("    dc_dbrms = %2.0f dB", dc_dbrms);
+
+    if (dc_dbrms < _lowest_offset){
+        _lowest_offset = dc_dbrms;
+        better = true;
+        if (_verbose) printf("    *");
+        if (_debug_raw_data) write_samples_to_file(_buff, "best_samples.dat");
+    }
+    if (_verbose) printf("\n");
+
+    return better;
+}
+
+/***********************************************************************
+ * Calibration method: Downhill
+ **********************************************************************/
+static result_t calibrate_downhill(dc_cal_t &dc_cal,
+                                   double tx_lo,
+                                   int verbose)
+{
+    //bounds and results from searching
+    int dc_i_start, dc_i_stop, dc_i_step;
+    int dc_q_start, dc_q_stop, dc_q_step;
+
+    //capture initial uncorrected value
+    const double initial_dc_dbrms = dc_cal.init();
+
+    for (size_t i = 0; i < 6; i++)
+    {
+        if (verbose) printf("  iteration %ld  best_i = %d  best_q = %d\n", i, dc_cal.get_best_dc_i(), dc_cal.get_best_dc_q());
+
+        switch (i) {
+        case 0:
+            dc_i_start = 0;
+            dc_i_stop  = 256;
+            dc_q_start = 0;
+            dc_q_stop  = 256;
+            dc_i_step = 10;
+            dc_q_step = 10;
+            break;
+        case 1:
+            dc_i_start = dc_cal.get_best_dc_i() - 15;
+            dc_i_stop  = dc_cal.get_best_dc_i() + 15;
+            dc_q_start = dc_cal.get_best_dc_q() - 15;
+            dc_q_stop  = dc_cal.get_best_dc_q() + 15;
+            dc_i_step = 1;
+            dc_q_step = 1;
+            break;
+        case 2:
+        case 3:
+            dc_i_start = dc_cal.get_best_dc_i() - 3;
+            dc_i_stop  = dc_cal.get_best_dc_i() + 3;
+            dc_q_start = dc_cal.get_best_dc_q() - 3;
+            dc_q_stop  = dc_cal.get_best_dc_q() + 3;
+            dc_i_step = 1;
+            dc_q_step = 1;
+            break;
+        default:
+            dc_i_start = dc_cal.get_best_dc_i() - 1;
+            dc_i_stop  = dc_cal.get_best_dc_i() + 1;
+            dc_q_start = dc_cal.get_best_dc_q() - 1;
+            dc_q_stop  = dc_cal.get_best_dc_q() + 1;
+            dc_i_step = 1;
+            dc_q_step = 1;
+            break;
+        };
+
+        if (i <= 2) {
+            // Itereate through I and Q sequentially
+
+            if (verbose) printf("    I in [%d; %d] step %d Q = %d\n",
+                                            dc_i_start, dc_i_stop, dc_i_step, dc_cal.get_best_dc_q());
+            dc_cal.set_dc_q_best();
+            for (int dc_i = dc_i_start; dc_i <= dc_i_stop; dc_i += dc_i_step){
+                dc_cal.run_i(dc_i);
+            }
+
+            if (verbose) printf("    I = %d Q in [%d; %d] step %d\n",
+                                            dc_cal.get_best_dc_i(), dc_q_start, dc_q_stop, dc_q_step);
+            dc_cal.set_dc_i_best();
+            for (int dc_q = dc_q_start; dc_q <= dc_q_stop; dc_q += dc_q_step){
+                dc_cal.run_q(dc_q);
+            }
+        } else {
+            // Itereate through all combinations of I and Q
+
+            if (verbose) printf("    I in [%d; %d] step %d Q in [%d; %d] step %d\n",
+                                dc_i_start, dc_i_stop, dc_i_step,
+                                dc_q_start, dc_q_stop, dc_q_step);
+            for (int dc_i = dc_i_start; dc_i <= dc_i_stop; dc_i += dc_i_step) {
+                for (int dc_q = dc_q_start; dc_q <= dc_q_stop; dc_q += dc_q_step) {
+                    dc_cal.run_iq(dc_i, dc_q);
+                }
+            }
        }
-        tx_stream->send(&buff.front(), buff.size(), md);
+
    }

-    //send a mini EOB packet
-    md.end_of_burst = true;
-    tx_stream->send("", 0, md);
-}
+    // Calibration result
+    result_t result;
+    result.freq = tx_lo;
+    result.real_corr = dc_cal.get_best_dc_i();
+    result.imag_corr = dc_cal.get_best_dc_q();
+    result.best = dc_cal.get_lowest_offset();
+    result.delta = initial_dc_dbrms - result.best;

-/***********************************************************************
- * Tune RX and TX routine
- **********************************************************************/
-static double tune_rx_and_tx(uhd::usrp::multi_usrp::sptr usrp, const double tx_lo_freq, const double rx_offset){
-    //tune the transmitter with no cordic
-    uhd::tune_request_t tx_tune_req(tx_lo_freq);
-    tx_tune_req.dsp_freq_policy = uhd::tune_request_t::POLICY_MANUAL;
-    tx_tune_req.dsp_freq = 0;
-    usrp->set_tx_freq(tx_tune_req);
+    // Output to console
+    std::cout
+        << result.freq/1e6 << " MHz "
+        << "I/Q = " << result.real_corr << "/" << result.imag_corr << " "
+        << "(" << dc_offset_int2double(result.real_corr) << "/"
+        <<  dc_offset_int2double(result.imag_corr) << ") "
+        << "leakage = " << result.best << " dB, "
+        << "improvement = " << result.delta << " dB\n"
+        << std::flush
+    ;

-    //tune the receiver
-    usrp->set_rx_freq(uhd::tune_request_t(usrp->get_tx_freq(), rx_offset));
-
-    boost::this_thread::sleep(boost::posix_time::milliseconds(10));
-    return usrp->get_tx_freq();
-}
-
-/***********************************************************************
- * random uniform int
- **********************************************************************/
-static int uniform_rand(const int low, const int high)
-{
-    static boost::random::mt19937 rng;
-    boost::random::uniform_int_distribution<> dist(low, high);
-    return dist(rng);
+    return result;
 }

 /***********************************************************************
 * Main
 **********************************************************************/
 int UHD_SAFE_MAIN(int argc, char *argv[]){
-    std::string args;
+    std::string args, which, serial;
+    int verbose;
+    int vga1_gain, vga2_gain, rx_gain;
    double tx_wave_freq, tx_wave_ampl, rx_offset;
    double freq_start, freq_stop, freq_step;
    size_t nsamps;
    size_t ntrials;
-    std::string which;
+    int single_test_i, single_test_q;

    po::options_description desc("Allowed options");
    desc.add_options()
@@ -113,15 +301,22 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
        ("verbose", "enable some verbose")
        ("debug_raw_data", "save raw captured signals to files")
        ("args", po::value<std::string>(&args)->default_value(""), "device address args [default = \"\"]")
+        ("which", po::value<std::string>(&which)->default_value("A"), "Which chain A or B?")
+        ("vga1", po::value<int>(&vga1_gain)->default_value(-20), "LMS6002D Tx VGA1 gain [-35 to -4]")
+        ("vga2", po::value<int>(&vga2_gain)->default_value(22), "LMS6002D Tx VGA2 gain [0 to 25]")
+        ("rx_gain", po::value<int>(&rx_gain)->default_value(50), "LMS6002D Rx combined gain [0 to 156]")
        ("tx_wave_freq", po::value<double>(&tx_wave_freq)->default_value(50e3), "Transmit wave frequency in Hz")
        ("tx_wave_ampl", po::value<double>(&tx_wave_ampl)->default_value(0.7), "Transmit wave amplitude in counts")
-        ("rx_offset", po::value<double>(&rx_offset)->default_value(.9344e6), "RX LO offset from the TX LO in Hz")
+        ("rx_offset", po::value<double>(&rx_offset)->default_value(300e3), "RX LO offset from the TX LO in Hz")
        ("freq_start", po::value<double>(&freq_start), "Frequency start in Hz (do not specify for default)")
        ("freq_stop", po::value<double>(&freq_stop), "Frequency stop in Hz (do not specify for default)")
        ("freq_step", po::value<double>(&freq_step)->default_value(default_freq_step), "Step size for LO sweep in Hz")
        ("nsamps", po::value<size_t>(&nsamps)->default_value(default_num_samps), "Samples per data capture")
        ("ntrials", po::value<size_t>(&ntrials)->default_value(1), "Num trials per TX LO")
-        ("which", po::value<std::string>(&which)->default_value("A"), "Which chain A or B?")
+        ("single_test", "Perform a single measurement and exit (freq = freq_start, I = single_test_i, Q = single_test_q]")
+        ("single_test_i", po::value<int>(&single_test_i)->default_value(128), "Only in the single test mode! I channel calibration value [0 to 255]")
+        ("single_test_q", po::value<int>(&single_test_q)->default_value(128), "Only in the single test mode! Q channel calibration value [0 to 255]")
+        ("append", "Append measurements to the calibratoin file instead of rewriting [default=overwrite]")
    ;

    po::variables_map vm;
@@ -130,31 +325,17 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){

    //print the help message
    if (vm.count("help")){
-        std::cout << boost::format("USRP Generate TX DC Offset Calibration Table %s") % desc << std::endl;
+        std::cout << boost::format("UmTRX Generate TX DC Offset Calibration Table %s") % desc << std::endl;
        std::cout <<
-            "This application measures leakage between RX and TX on an XCVR daughterboard to self-calibrate.\n"
+            "This application measures leakage between RX and TX using LMS6002D internal RF loopback to self-calibrate.\n"
            << std::endl;
-        return ~0;
+        return EXIT_FAILURE;
    }

-    //create a usrp device
-    std::cout << std::endl;
-    std::cout << boost::format("Creating the usrp device with: %s...") % args << std::endl;
-    uhd::usrp::multi_usrp::sptr usrp = uhd::usrp::multi_usrp::make(args);
+    verbose = vm.count("verbose");

-    //set subdev spec
-    usrp->set_rx_subdev_spec(which+":0");
-    usrp->set_tx_subdev_spec(which+":0");
-
-    //set the antennas to cal
-    if (not uhd::has(usrp->get_rx_antennas(), "CAL") or not uhd::has(usrp->get_tx_antennas(), "CAL")){
-        throw std::runtime_error("This board does not have the CAL antenna option, cannot self-calibrate.");
-    }
-    usrp->set_rx_antenna("CAL");
-    usrp->set_tx_antenna("CAL");
-
-    //set optimum defaults
-    set_optimum_defaults(usrp);
+    // Create a USRP device
+    uhd::usrp::multi_usrp::sptr usrp = setup_usrp_for_cal(args, which, serial, vga1_gain, vga2_gain, rx_gain, verbose);

    //create a receive streamer
    uhd::stream_args_t stream_args("fc32"); //complex floats
@@ -164,18 +345,18 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
    boost::thread_group threads;
    threads.create_thread(boost::bind(&tx_thread, usrp, tx_wave_freq, tx_wave_ampl));

-    //re-usable buffer for samples
-    std::vector<samp_type> buff;
-
    //store the results here
    std::vector<result_t> results;

+    uhd::property_tree::sptr tree = usrp->get_device()->get_tree();
    const uhd::fs_path tx_fe_path = "/mboards/0/dboards/"+which+"/tx_frontends/0";
-    uhd::property<uint8_t> &dc_i_prop = usrp->get_device()->get_tree()->access<uint8_t>(tx_fe_path / "lms6002d/tx_dc_i/value");
-    uhd::property<uint8_t> &dc_q_prop = usrp->get_device()->get_tree()->access<uint8_t>(tx_fe_path / "lms6002d/tx_dc_q/value");
+    uhd::property<uint8_t> &dc_i_prop = tree->access<uint8_t>(tx_fe_path / "lms6002d/tx_dc_i/value");
+    uhd::property<uint8_t> &dc_q_prop = tree->access<uint8_t>(tx_fe_path / "lms6002d/tx_dc_q/value");

    if (not vm.count("freq_start")) freq_start = usrp->get_tx_freq_range().start() + 50e6;
    if (not vm.count("freq_stop")) freq_stop = usrp->get_tx_freq_range().stop() - 50e6;
+    UHD_MSG(status) << boost::format("Calibration frequency type: DC offset") << std::endl;
+    UHD_MSG(status) << boost::format("Calibration frequency range: %d MHz -> %d MHz") % (freq_start/1e6) % (freq_stop/1e6) << std::endl;

    for (double tx_lo_i = freq_start; tx_lo_i <= freq_stop; tx_lo_i += freq_step){
        const double tx_lo = tune_rx_and_tx(usrp, tx_lo_i, rx_offset);
@@ -185,77 +366,37 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
        const double actual_tx_freq = usrp->get_tx_freq();
        const double actual_rx_freq = usrp->get_rx_freq();
        const double bb_dc_freq = actual_tx_freq - actual_rx_freq;
-        if (vm.count("verbose")) printf("actual_rx_rate = %0.2f MHz\n", actual_rx_rate/1e6);
-        if (vm.count("verbose")) printf("actual_tx_freq = %0.2f MHz\n", actual_tx_freq/1e6);
-        if (vm.count("verbose")) printf("actual_rx_freq = %0.2f MHz\n", actual_rx_freq/1e6);
-        if (vm.count("verbose")) printf("bb_dc_freq = %0.2f MHz\n", bb_dc_freq/1e6);
+        if (verbose) printf("actual_rx_rate = %0.2f MHz\n", actual_rx_rate/1e6);
+        if (verbose) printf("actual_tx_freq = %0.2f MHz\n", actual_tx_freq/1e6);
+        if (verbose) printf("actual_rx_freq = %0.2f MHz\n", actual_rx_freq/1e6);
+        if (verbose) printf("bb_dc_freq = %0.2f MHz\n", bb_dc_freq/1e6);

        for (size_t trial_no = 0; trial_no < ntrials; trial_no++)
        {
-            //bounds and results from searching
-            double lowest_offset;
-            int best_dc_i = 128, best_dc_q = 128;
-
-            //capture initial uncorrected value
-            dc_i_prop.set(best_dc_i);
-            dc_q_prop.set(best_dc_q);
-            capture_samples(rx_stream, buff, nsamps);
-            const double initial_dc_dbrms = compute_tone_dbrms(buff, bb_dc_freq/actual_rx_rate);
-            lowest_offset = initial_dc_dbrms;
-            if (vm.count("verbose")) printf("initial_dc_dbrms = %2.0f dB\n", initial_dc_dbrms);
-
-            if (vm.count("debug_raw_data")) write_samples_to_file(buff, "initial_samples.dat");
-
-            for (int bound = 256; bound >= 8; bound /= 2) //how many bits of precision to care about for the search
+            if (vm.count("single_test"))
            {
-                if (vm.count("verbose")) printf("  iteration %du\n", bound);
+                dc_cal_t dc_cal(dc_i_prop, dc_q_prop,
+                                rx_stream,
+                                nsamps,
+                                bb_dc_freq,
+                                actual_rx_rate,
+                                verbose,
+                                vm.count("debug_raw_data"),
+                                single_test_i, single_test_q);

-                bool has_improvement = false;
-                for (int rand_search_no = 0; rand_search_no < bound/4; rand_search_no++) //how many random points to inspect
-                {
-                    int dc_i = uniform_rand(std::max(0, best_dc_i-bound/2), std::min(256, best_dc_i+bound/2));
-                    int dc_q = uniform_rand(std::max(0, best_dc_q-bound/2), std::min(256, best_dc_q+bound/2));
-                    if (vm.count("verbose")) std::cout << "bound " << bound << " dc_i " << dc_i << " dc_q " << dc_q << std::endl;
-
-                    dc_i_prop.set(dc_i);
-                    dc_q_prop.set(dc_q);
-
-                    //receive some samples
-                    capture_samples(rx_stream, buff, nsamps);
-
-                    const double dc_dbrms = compute_tone_dbrms(buff, bb_dc_freq/actual_rx_rate);
-                    if (vm.count("verbose")) printf("    dc_dbrms = %2.0f dB", dc_dbrms);
-
-                    if (dc_dbrms < lowest_offset){
-                        lowest_offset = dc_dbrms;
-                        best_dc_i = dc_i;
-                        best_dc_q = dc_q;
-                        has_improvement = true;
-                        if (vm.count("verbose")) printf("    *");
-                        if (vm.count("debug_raw_data")) write_samples_to_file(buff, "best_samples.dat");
-                    }
-                    if (vm.count("verbose")) printf("\n");
-                }
-
-                // Stop iterating if no imprevement, but do at least 3 iterations
-                if (!has_improvement and bound < 64) break;
-            }
-
-            if (vm.count("verbose")) printf("  best_dc_i = %d best_dc_q = %d", best_dc_i, best_dc_q);
-            if (vm.count("verbose")) printf("  lowest_offset = %2.0f dB  delta = %2.0f dB\n", lowest_offset, initial_dc_dbrms - lowest_offset);
-
-            if (lowest_offset < initial_dc_dbrms){ //most likely valid, keep result
-                result_t result;
-                result.freq = tx_lo;
-                result.real_corr = best_dc_i;
-                result.imag_corr = best_dc_q;
-                result.best = lowest_offset;
-                result.delta = initial_dc_dbrms - lowest_offset;
-                results.push_back(result);
-                if (vm.count("verbose")){
-                    std::cout << boost::format("TX DC: %f MHz: lowest offset %f dB, corrected %f dB") % (tx_lo/1e6) % result.best % result.delta << std::endl;
-                }
-                else std::cout << "." << std::flush;
+                const double dc_dbrms = dc_cal.init();;
+                printf("I = %d Q = %d ", single_test_i, single_test_q);
+                printf("dc_dbrms = %2.1f dB\n", dc_dbrms);
+            } else {
+                dc_cal_t dc_cal(dc_i_prop, dc_q_prop,
+                                rx_stream,
+                                nsamps,
+                                bb_dc_freq,
+                                actual_rx_rate,
+                                verbose,
+                                vm.count("debug_raw_data"));
+                // Perform normal calibration
+                results.push_back(calibrate_downhill(dc_cal, tx_lo, verbose));
            }
        }
    }
@@ -265,7 +406,8 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
    threads.interrupt_all();
    threads.join_all();

-    store_results(usrp, results, "TX", "tx", "lms_dc", which);
+    if (not vm.count("single_test"))
+        store_results(usrp, results, "tx", "dc", vm.count("append"));

-    return 0;
+    return EXIT_SUCCESS;
 }
--- a/host/utils/umtrx_cal_tx_dc_offset.py
+++ b/host/utils/umtrx_cal_tx_dc_offset.py
@@ -0,0 +1,243 @@
+import SoapySDR
+from SoapySDR import *
+import math
+import numpy
+import matplotlib.pyplot as plt
+from scipy import signal
+import random
+import time
+import os
+from optparse import OptionParser
+
+SAMP_RATE = 13e6/4
+FREQ_OFFSET = 0.3e6
+FREQ_START = 700e6
+FREQ_STOP = 1200e6
+FREQ_STEP = 7e6
+FREQ_VALIDATION_STEP = 2e6
+SIDE = "A"
+
+import numpy as np
+def find_nearest(array,value):
+    idx = (np.abs(array-value)).argmin()
+    return array[idx]
+
+def calcAvgPs(umtrx, rxStream, fftSize = 4096, numFFT = 10, numSkips=2):
+    samps = numpy.array([0]*fftSize, numpy.complex64)
+    avgFFT = numpy.array([0]*fftSize, numpy.complex64)
+
+    while umtrx.readStream(rxStream, [samps], fftSize, 0, 1000).ret != SOAPY_SDR_TIMEOUT: pass #read until timeout
+    umtrx.activateStream(rxStream, SOAPY_SDR_END_BURST, 0, fftSize*(numFFT+numSkips))
+
+    numActualFFTs = 0
+    for i in range(numFFT+numSkips):
+        if umtrx.readStream(rxStream, [samps], fftSize).ret != fftSize:
+            print 'D'
+            return calcAvgPs(umtrx, rxStream, fftSize, numFFT, numSkips)
+        if i < numSkips: continue #skip first for transients
+        samps *= signal.flattop(fftSize)
+        avgFFT += numpy.fft.fft(samps)
+        numActualFFTs += 1
+    avgFFT /= numActualFFTs
+    assert(len(avgFFT) == fftSize)
+
+    ps = 10*numpy.log10(numpy.abs(avgFFT)) - 20*math.log10(fftSize)
+    freqs = numpy.fft.fftfreq(fftSize, 1.0/SAMP_RATE)
+    return ps, freqs
+
+def measureToneFromPs(ps_freqs, toneFreq, BW=SAMP_RATE/25):
+    ps, freqs = ps_freqs
+    tonePower = None
+    for idx in range(len(ps)):
+        if freqs[idx] > toneFreq-BW/2 and freqs[idx] < toneFreq+BW/2:
+            if tonePower is None: tonePower = ps[idx]
+            tonePower = max(ps[idx], tonePower)
+    return tonePower
+
+def validateWithMeasurements(umtrx, rxStream, toneFreq, numAvgPts=5):
+    powers = list()
+    for i in range(numAvgPts):
+        ps, freqs = calcAvgPs(umtrx, rxStream)
+        powers.append(measureToneFromPs((ps, freqs), toneFreq))
+    return 10*numpy.log(numpy.average(numpy.exp(numpy.array(powers)/10))), numpy.std(powers)
+
+def main():
+    umtrx = SoapySDR.Device(dict(driver='uhd', type='umtrx'))
+
+    #frontend map selects side on ch0
+    umtrx.setFrontendMapping(SOAPY_SDR_RX, SIDE+":0")
+    umtrx.setFrontendMapping(SOAPY_SDR_TX, SIDE+":0")
+
+    #print cal file we will use
+    serial = umtrx.getHardwareInfo()['tx0_serial']
+    cal_dest = os.path.join(os.path.expanduser("~"), '.uhd', 'cal', "tx_dc_cal_v0.2_%s.csv"%serial)
+    print 'going to write calibration data to:', cal_dest
+
+    #cal antennas for loopback
+    umtrx.setAntenna(SOAPY_SDR_RX, 0, "CAL")
+    umtrx.setAntenna(SOAPY_SDR_TX, 0, "CAL")
+
+    #set a low sample rate
+    umtrx.setSampleRate(SOAPY_SDR_RX, 0, SAMP_RATE)
+    umtrx.setSampleRate(SOAPY_SDR_TX, 0, SAMP_RATE)
+
+    rxStream = umtrx.setupStream(SOAPY_SDR_RX, "CF32")
+
+    #calibrate out dc offset at select frequencies
+    best_correction_per_freq = dict()
+    best_dc_power_per_freq = dict()
+    initial_dc_power_per_freq = dict()
+    stddev_dc_power_per_freq = dict()
+    average_dc_power_per_freq = dict()
+
+    for freq in numpy.arange(FREQ_START, FREQ_STOP, FREQ_STEP):
+
+        print 'Doing freq:', freq/1e6, 'MHz'
+
+        #tune rx with offset so we can see tx DC
+        umtrx.setFrequency(SOAPY_SDR_TX, 0, freq)
+        umtrx.setFrequency(SOAPY_SDR_RX, 0, freq + FREQ_OFFSET)
+        umtrx.getHardwareTime() #readback so commands are processed
+
+        best_correction = 0.0
+        best_dc_power = None
+
+        #grab values before correction
+        umtrx.setDCOffset(SOAPY_SDR_TX, 0, best_correction)
+        averagePowers, stddevPowers = validateWithMeasurements(umtrx, rxStream, -FREQ_OFFSET)
+        initial_dc_power_per_freq[freq] = averagePowers
+
+        for bound in (0.1, 0.05, 0.01):
+            this_correction = best_correction
+
+            for searchNo in range(50):
+
+                #print 'searchNo',searchNo
+
+                corr_i = random.uniform(this_correction.real-bound, this_correction.real+bound)
+                corr_q = random.uniform(this_correction.imag-bound, this_correction.imag+bound)
+
+                correction = complex(min(max(corr_i, -1), 1), min(max(corr_q, -1), 1))
+
+                umtrx.setDCOffset(SOAPY_SDR_TX, 0, correction)
+
+                ps, freqs = calcAvgPs(umtrx, rxStream)
+                dc_power = measureToneFromPs((ps, freqs), -FREQ_OFFSET)
+
+                if best_dc_power is None or best_dc_power > dc_power:
+                    best_dc_power = dc_power
+                    best_correction = correction
+
+        print 'best_dc_power', best_dc_power, ' best_correction', best_correction
+
+        #prove that its really the best...
+        umtrx.setDCOffset(SOAPY_SDR_TX, 0, best_correction)
+        averagePowers, stddevPowers = validateWithMeasurements(umtrx, rxStream, -FREQ_OFFSET)
+        print 'averagePowers', averagePowers
+        print 'stddevPowers', stddevPowers
+
+        best_correction_per_freq[freq] = best_correction
+        best_dc_power_per_freq[freq] = best_dc_power
+        stddev_dc_power_per_freq[freq] = stddevPowers
+        average_dc_power_per_freq[freq] = averagePowers
+
+    ########################################################################
+    ## produce tx cal serial format
+    ########################################################################
+    cal_data = open(cal_dest, 'w')
+
+    cal_data.write("name, TX Frontend Calibration\n")
+    cal_data.write("serial, %s\n"%serial)
+    cal_data.write("timestamp, %d\n"%int(time.time()))
+    cal_data.write("version, 0, 1\n")
+    cal_data.write("DATA STARTS HERE\n")
+    cal_data.write("lo_frequency, correction_real, correction_imag, measured, delta\n")
+    for freq in sorted(best_correction_per_freq.keys()):
+        cal_data.write(', '.join(map(str, [
+            freq,
+            best_correction_per_freq[freq].real,
+            best_correction_per_freq[freq].imag,
+            best_dc_power_per_freq[freq],
+            initial_dc_power_per_freq[freq]-best_dc_power_per_freq[freq],
+        ])) + '\n')
+    print ('wrote cal data to %s'%cal_dest)
+
+    """
+    #recollect dc offsets with corrections applied:
+    validation_average_dc_offsets_per_freq = dict()
+    validation_stddev_dc_offsets_per_freq = dict()
+    original_dc_power_per_freq = dict()
+
+    for freq in numpy.arange(FREQ_START, FREQ_STOP, FREQ_VALIDATION_STEP):
+
+        #tune rx with offset so we can see tx DC
+        umtrx.setFrequency(SOAPY_SDR_TX, 0, freq)
+        umtrx.setFrequency(SOAPY_SDR_RX, 0, freq + FREQ_OFFSET)
+        umtrx.getHardwareTime() #readback so commands are processed
+
+        umtrx.setDCOffset(SOAPY_SDR_TX, 0, 0.0)
+
+        #get the original value before corrections
+        averagePowers, stddevPowers = validateWithMeasurements(umtrx, rxStream, -FREQ_OFFSET)
+        original_dc_power_per_freq[freq] = averagePowers
+
+        #pick the correction to use (closest in freq)
+        correction_freq = find_nearest(best_correction_per_freq.keys(), freq)
+        correction = best_correction_per_freq[correction_freq]
+
+        #perform the measurements again
+        umtrx.setDCOffset(SOAPY_SDR_TX, 0, correction)
+        averagePowers, stddevPowers = validateWithMeasurements(umtrx, rxStream, -FREQ_OFFSET)
+
+        validation_average_dc_offsets_per_freq[freq] = averagePowers
+        validation_stddev_dc_offsets_per_freq[freq] = stddevPowers
+
+    umtrx.closeStream(rxStream)
+
+    plt.figure(1)
+
+    plt.subplot(311)
+    freqs = sorted(average_dc_power_per_freq.keys())
+    vals = [average_dc_power_per_freq[f] for f in freqs]
+    cor_data = plt.plot(numpy.array(freqs)/1e6, vals, label='Correction')
+    freqs = sorted(validation_average_dc_offsets_per_freq.keys())
+    vals = [validation_average_dc_offsets_per_freq[f] for f in freqs]
+    val_data = plt.plot(numpy.array(freqs)/1e6, vals, label='Validation')
+    legend = plt.legend(loc='upper right', shadow=True)
+    plt.title("Freq (MHz) vs average power (dB)")
+    plt.grid(True)
+
+    plt.subplot(312)
+    freqs = sorted(stddev_dc_power_per_freq.keys())
+    vals = [stddev_dc_power_per_freq[f] for f in freqs]
+    cor_data = plt.plot(numpy.array(freqs)/1e6, vals, label='Correction')
+    freqs = sorted(validation_stddev_dc_offsets_per_freq.keys())
+    vals = [validation_stddev_dc_offsets_per_freq[f] for f in freqs]
+    val_data = plt.plot(numpy.array(freqs)/1e6, vals, label='Validation')
+    legend = plt.legend(loc='upper right', shadow=True)
+    plt.title("Freq (MHz) vs stddev power (dB)")
+    plt.grid(True)
+
+    plt.subplot(313)
+    freqs = sorted(original_dc_power_per_freq.keys())
+    vals = [abs(original_dc_power_per_freq[f]-validation_average_dc_offsets_per_freq[f]) for f in freqs]
+    plt.plot(numpy.array(freqs)/1e6, vals, label='Correction')
+    plt.title("Freq (MHz) vs correction (dB)")
+    plt.grid(True)
+
+    plt.show()
+    """
+
+if __name__ == '__main__':
+    parser = OptionParser()
+    parser.add_option("--side", dest="side", default=SIDE, help="A or B [default: %default]")
+    parser.add_option("--freq-start", dest="freq_start", default=FREQ_START, type="float", help="frequency start point in Hz [default: %default]")
+    parser.add_option("--freq-stop", dest="freq_stop", default=FREQ_STOP, type="float", help="frequency stop point in Hz [default: %default]")
+    parser.add_option("--freq-step", dest="freq_step", default=FREQ_STEP, type="float", help="frequency step size in Hz [default: %default]")
+    (options, args) = parser.parse_args()
+    SIDE = options.side
+    FREQ_START = options.freq_start
+    FREQ_STOP = options.freq_stop
+    FREQ_STEP = options.freq_step
+
+    main()
--- a/host/utils/umtrx_cal_tx_iq_balance.cpp
+++ b/host/utils/umtrx_cal_tx_iq_balance.cpp
@@ -0,0 +1,187 @@
+//
+// Copyright 2010,2012 Ettus Research LLC
+// Copyright 2015 Fairwaves, Inc
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#include "usrp_cal_utils.hpp"
+#include <uhd/utils/safe_main.hpp>
+#include <boost/program_options.hpp>
+#include <boost/math/special_functions/round.hpp>
+#include <iostream>
+#include <complex>
+#include <ctime>
+#include <cstdlib>
+
+namespace po = boost::program_options;
+
+static const size_t num_search_steps = 5;
+static const size_t num_search_iters = 7;
+
+/***********************************************************************
+ * Main
+ **********************************************************************/
+int UHD_SAFE_MAIN(int argc, char *argv[]){
+    std::string args, which, serial;
+    int verbose;
+    int vga1_gain, vga2_gain, rx_gain;
+    double tx_wave_freq, tx_wave_ampl, rx_offset;
+    double freq_start, freq_stop, freq_step;
+    size_t nsamps;
+
+    po::options_description desc("Allowed options");
+    desc.add_options()
+        ("help", "help message")
+        ("verbose", "enable some verbose")
+        ("args", po::value<std::string>(&args)->default_value(""), "device address args [default = \"\"]")
+        ("which", po::value<std::string>(&which)->default_value("A"), "Which chain A or B?")
+        ("vga1", po::value<int>(&vga1_gain)->default_value(-20), "LMS6002D Tx VGA1 gain [-35 to -4]")
+        ("vga2", po::value<int>(&vga2_gain)->default_value(22), "LMS6002D Tx VGA2 gain [0 to 25]")
+        ("rx_gain", po::value<int>(&rx_gain)->default_value(50), "LMS6002D Rx combined gain [0 to 156]")
+        ("tx_wave_freq", po::value<double>(&tx_wave_freq)->default_value(50e3), "Transmit wave frequency in Hz")
+        ("tx_wave_ampl", po::value<double>(&tx_wave_ampl)->default_value(0.7), "Transmit wave amplitude in counts")
+        ("rx_offset", po::value<double>(&rx_offset)->default_value(300e3), "RX LO offset from the TX LO in Hz")
+        ("freq_start", po::value<double>(&freq_start), "Frequency start in Hz (do not specify for default)")
+        ("freq_stop", po::value<double>(&freq_stop), "Frequency stop in Hz (do not specify for default)")
+        ("freq_step", po::value<double>(&freq_step)->default_value(default_freq_step), "Step size for LO sweep in Hz")
+        ("nsamps", po::value<size_t>(&nsamps)->default_value(default_num_samps), "Samples per data capture")
+        ("append", "Append measurements to the calibratoin file instead of rewriting [default=overwrite]")
+    ;
+
+    po::variables_map vm;
+    po::store(po::parse_command_line(argc, argv, desc), vm);
+    po::notify(vm);
+
+    //print the help message
+    if (vm.count("help")){
+        std::cout << boost::format("UmTRX Generate TX IQ Balance Calibration Table %s") % desc << std::endl;
+        std::cout <<
+            "This application measures leakage between RX and TX using LMS6002D internal RF loopback to self-calibrate.\n"
+            << std::endl;
+        return EXIT_FAILURE;
+    }
+
+    verbose = vm.count("verbose");
+
+    // Create a USRP device
+    uhd::usrp::multi_usrp::sptr usrp = setup_usrp_for_cal(args, which, serial, vga1_gain, vga2_gain, rx_gain, verbose);
+
+    //create a receive streamer
+    uhd::stream_args_t stream_args("fc32"); //complex floats
+    uhd::rx_streamer::sptr rx_stream = usrp->get_rx_stream(stream_args);
+
+    //create a transmitter thread
+    boost::thread_group threads;
+    threads.create_thread(boost::bind(&tx_thread, usrp, tx_wave_freq, tx_wave_ampl));
+
+    //re-usable buffer for samples
+    std::vector<samp_type> buff;
+
+    //store the results here
+    std::vector<result_t> results;
+
+    uhd::property_tree::sptr tree = usrp->get_device()->get_tree();
+    const uhd::fs_path tx_fe_path = "/mboards/0/tx_frontends/"+which;
+    uhd::property<std::complex<double> > &iq_prop = tree->access<std::complex<double> >(tx_fe_path / "iq_balance" / "value");
+
+    if (not vm.count("freq_start")) freq_start = usrp->get_tx_freq_range().start() + 50e6;
+    if (not vm.count("freq_stop")) freq_stop = usrp->get_tx_freq_range().stop() - 50e6;
+    UHD_MSG(status) << boost::format("Calibration frequency type: IQ balance") << std::endl;
+    UHD_MSG(status) << boost::format("Calibration frequency range: %d MHz -> %d MHz") % (freq_start/1e6) % (freq_stop/1e6) << std::endl;
+
+    for (double tx_lo_i = freq_start; tx_lo_i <= freq_stop; tx_lo_i += freq_step){
+        const double tx_lo = tune_rx_and_tx(usrp, tx_lo_i, rx_offset);
+
+        //frequency constants for this tune event
+        const double actual_rx_rate = usrp->get_rx_rate();
+        const double actual_tx_freq = usrp->get_tx_freq();
+        const double actual_rx_freq = usrp->get_rx_freq();
+        const double bb_tone_freq = actual_tx_freq + tx_wave_freq - actual_rx_freq;
+        const double bb_imag_freq = actual_tx_freq - tx_wave_freq - actual_rx_freq;
+
+        //capture initial uncorrected value
+        iq_prop.set(0.0);
+        capture_samples(rx_stream, buff, nsamps);
+        const double initial_suppression = compute_tone_dbrms(buff, bb_tone_freq/actual_rx_rate) - compute_tone_dbrms(buff, bb_imag_freq/actual_rx_rate);
+
+        //bounds and results from searching
+        std::complex<double> best_correction;
+        double phase_corr_start = -.3, phase_corr_stop = .3, phase_corr_step;
+        double ampl_corr_start = -.3, ampl_corr_stop = .3, ampl_corr_step;
+        double best_suppression = 0, best_phase_corr = 0, best_ampl_corr = 0;
+
+        for (size_t i = 0; i < num_search_iters; i++){
+
+            phase_corr_step = (phase_corr_stop - phase_corr_start)/(num_search_steps-1);
+            ampl_corr_step = (ampl_corr_stop - ampl_corr_start)/(num_search_steps-1);
+
+            for (double phase_corr = phase_corr_start; phase_corr <= phase_corr_stop + phase_corr_step/2; phase_corr += phase_corr_step){
+            for (double ampl_corr = ampl_corr_start; ampl_corr <= ampl_corr_stop + ampl_corr_step/2; ampl_corr += ampl_corr_step){
+
+                const std::complex<double> correction(ampl_corr, phase_corr);
+                iq_prop.set(correction);
+
+                //receive some samples
+                capture_samples(rx_stream, buff, nsamps);
+
+                const double tone_dbrms = compute_tone_dbrms(buff, bb_tone_freq/actual_rx_rate);
+                const double imag_dbrms = compute_tone_dbrms(buff, bb_imag_freq/actual_rx_rate);
+                const double suppression = tone_dbrms - imag_dbrms;
+
+                if (suppression > best_suppression){
+                    best_correction = correction;
+                    best_suppression = suppression;
+                    best_phase_corr = phase_corr;
+                    best_ampl_corr = ampl_corr;
+                }
+
+            }}
+
+            if (verbose) std::cout << "best_phase_corr " << best_phase_corr << std::endl;
+            if (verbose) std::cout << "best_ampl_corr " << best_ampl_corr << std::endl;
+            if (verbose) std::cout << "best_suppression " << best_suppression << std::endl;
+
+            phase_corr_start = best_phase_corr - phase_corr_step;
+            phase_corr_stop = best_phase_corr + phase_corr_step;
+            ampl_corr_start = best_ampl_corr - ampl_corr_step;
+            ampl_corr_stop = best_ampl_corr + ampl_corr_step;
+        }
+
+        if (best_suppression > 30){ //most likely valid, keep result
+            result_t result;
+            result.freq = tx_lo;
+            result.real_corr = best_correction.real();
+            result.imag_corr = best_correction.imag();
+            result.best = best_suppression;
+            result.delta = best_suppression - initial_suppression;
+            results.push_back(result);
+            if (verbose){
+                std::cout << boost::format("TX IQ: %f MHz: best suppression %f dB, corrected %f dB") % (tx_lo/1e6) % result.best % result.delta << std::endl;
+            }
+            else std::cout << "." << std::flush;
+        }
+
+    }
+    std::cout << std::endl;
+
+    //stop the transmitter
+    threads.interrupt_all();
+    threads.join_all();
+
+    store_results(usrp, results, "tx", "iq", vm.count("append"));
+
+    return EXIT_SUCCESS;
+}
+
--- a/host/utils/umtrx_gps_coord
+++ b/host/utils/umtrx_gps_coord
@@ -0,0 +1,22 @@
+#!/bin/sh
+
+if [ "x$1" = "x-h" -o "x$1" = "x--help" ] ; then
+  echo "Usage:"
+  echo "  umtrx_gps_coord [umtrx_ip]"
+  echo
+  echo "  umtrx_ip - (optional) UmTRX IP address [default=192.168.10.2]"
+  echo
+  echo "Output:"
+  echo "  hh:mm:ss.SSS UTC <lat>N <lon>W <altitude> m"
+  exit 1
+fi
+
+if [ $# -eq 0 ] ; then
+  UMTRX_ADDR="192.168.10.2"
+else
+  UMTRX_ADDR=$1
+fi
+
+echo . | nc -u $UMTRX_ADDR 49171 | \
+  awk -F, '/\$GPGGA/ {print substr($2,0,3) ":" substr($2,3,2) ":" substr($2,5,2) "." substr($2,8,3) " UTC", (substr($3,0,2) + (substr($3,3) / 60.0)) $4,  (substr($5,0,3) + (substr($5,4) / 60.0)) $6, $10 " m"; fflush();}'
+
--- a/host/utils/umtrx_nmea
+++ b/host/utils/umtrx_nmea
@@ -0,0 +1,17 @@
+#!/bin/sh
+
+if [ "x$1" = "x-h" -o "x$1" = "x--help" ] ; then
+  echo "Usage:"
+  echo "  umtrx_nmea [umtrx_ip]"
+  echo
+  echo "  umtrx_ip - (optional) UmTRX IP address [default=192.168.10.2]"
+  exit 1
+fi
+
+if [ $# -eq 0 ] ; then
+  UMTRX_ADDR="192.168.10.2"
+else
+  UMTRX_ADDR=$1
+fi
+
+echo . | nc -u $UMTRX_ADDR 49171
--- a/host/utils/umtrx_pa_ctrl.cpp
+++ b/host/utils/umtrx_pa_ctrl.cpp
@@ -103,10 +103,10 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
        for (i = 0; i < 256; i++) {
            tree->access<uint8_t>(mb_path / "pa_dcdc_r").set(i);
            if (i == 0) {
-                sleep(1);
+                boost::this_thread::sleep(boost::posix_time::seconds(1));
            }

-            usleep(100 * 1000); // Wait for value to settle
+            boost::this_thread::sleep(boost::posix_time::milliseconds(100)); // Wait for value to settle

            std::cout << "[" << std::setw(3) << i << "]="
                      << tree->access<uhd::sensor_value_t>(mb_path / "sensors" / "voltageDCOUT").get().to_pp_string().c_str()
@@ -114,10 +114,10 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
        }
    }
    if (vm.count("divsw1")) {
-        tree->access<bool>(mb_path / "divsw1").set(divsw1 ? 1 : 0);
+        tree->access<bool>(mb_path / "dboards" / "A" / "rx_frontends" / "0" / "diversiy").set(divsw1 ? 1 : 0);
    }
    if (vm.count("divsw2")) {
-        tree->access<bool>(mb_path / "divsw2").set(divsw2 ? 1 : 0);
+        tree->access<bool>(mb_path / "dboards" / "B" / "rx_frontends" / "0" / "diversiy").set(divsw1 ? 1 : 0);
    }

    return 0;
--- a/host/utils/umtrx_property_tree.py
+++ b/host/utils/umtrx_property_tree.py
@@ -0,0 +1,112 @@
+#!/usr/bin/env python
+# -*- coding: utf-8 -*-
+
+##########################
+###  Property tree API
+##########################
+
+import socket
+import json
+
+class umtrx_property_tree:
+
+  def connect(self, host="localhost", port=12345):
+    self.s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
+    self.s.connect((host, port))
+    self.f = self.s.makefile()
+
+  def close(self):
+    self.s.close()
+
+  #
+  # Helper methods
+  #
+
+  def _send_request(self, action, path, value_type=None, value=None):
+    d = dict(action=action, path=path)
+    if value_type is not None: d['type'] = value_type
+    if value is not None: d['value'] = value
+    return self.s.send(json.dumps(d)+'\n')
+
+  def _recv_response(self):
+    resp = self.f.readline().strip()
+    if len(resp)>0:
+      return json.loads(resp)
+    else:
+      return None
+
+  #
+  # Getters (raw)
+  #
+
+  def query_bool_raw(self, path):
+    self._send_request('GET', path, value_type='BOOL')
+    return self._recv_response()
+
+  def query_int_raw(self, path):
+    self._send_request('GET', path, value_type='INT')
+    return self._recv_response()
+
+  def query_double_raw(self, path):
+    self._send_request('GET', path, value_type='DOUBLE')
+    return self._recv_response()
+
+  def query_sensor_raw(self, sensor_path):
+    self._send_request('GET', sensor_path, value_type='SENSOR')
+    return self._recv_response()
+
+  def query_range_raw(self, path):
+    self._send_request('GET', path, value_type='RANGE')
+    return self._recv_response()
+
+  #
+  # Getters (value)
+  #
+
+  def query_bool_value(self, path):
+    res = self.query_bool_raw(sensor_path)
+    return res['result']['value']
+
+  def query_int_value(self, path):
+    res = self.query_int_raw(sensor_path)
+    return res['result']['value']
+
+  def query_double_value(self, path):
+    res = self.query_double_raw(sensor_path)
+    return res['result']['value']
+
+  def query_sensor_value(self, sensor_path):
+    res = self.query_sensor_raw(sensor_path)
+    return res['result']['value']
+
+  def query_range_value(self, path):
+    res = self.query_range_raw(sensor_path)
+    return res['result']['value']
+
+  #
+  # Setters
+  #
+
+  def set_bool(self, path, val):
+    self._send_request('SET', path, value_type='BOOL', value=val)
+    return self._recv_response()
+
+  def set_int(self, path, val):
+    self._send_request('SET', path, value_type='INT', value=val)
+    return self._recv_response()
+
+  def set_double(self, path, val):
+    self._send_request('SET', path, value_type='DOUBLE', value=val)
+    return self._recv_response()
+
+  #
+  # Check path presence and list paths
+  #
+
+  def has_path_raw(self, path):
+    self._send_request('HAS', path)
+    return self._recv_response()
+
+  def list_path_raw(self, path):
+    self._send_request('LIST', path)
+    return self._recv_response()
--- a/host/utils/umtrx_query_sensors.py
+++ b/host/utils/umtrx_query_sensors.py
@@ -0,0 +1,49 @@
+#!/usr/bin/env python
+# -*- coding: utf-8 -*-
+
+##########################
+###  Query sensors
+##########################
+
+from umtrx_property_tree import umtrx_property_tree
+from umtrx_vswr import umtrx_vswr
+
+s = umtrx_property_tree()
+s.connect()
+
+sensors_path="/mboards/0/sensors"
+res = s.list_path_raw(sensors_path)
+sensors_list = res.get('result', [])
+
+print "Sensors:"
+for sensor in sensors_list:
+  reply = s.query_sensor_raw(sensors_path+"/"+sensor)
+  if reply.has_key('result'):
+    res = reply['result']
+    print "  %15s = %9s %s" % (res['name'], res['value'], res['unit'])
+  else:
+    print "Can't read sensor %s" % sensor
+
+#vswr_calibration = TM10_VSWR_cal
+#vswr_calibration = TM3_VSWR_cal
+vswr_calibration = 0
+for num in [1, 2]:
+  vpr_name = 'voltagePR'+str(num)
+  vpf_name = 'voltagePF'+str(num)
+  if vpr_name in sensors_list and vpf_name in sensors_list:
+    vpr = float(s.query_sensor_value(sensors_path+'/'+vpr_name))
+    vpf = float(s.query_sensor_value(sensors_path+'/'+vpf_name))
+    vswr = umtrx_vswr(vpf, vpr, vswr_calibration)
+    print "TRX %d power detector:" % num
+    print "              VPF =  %5.2f  V"   % vpf
+    print "               PF = %5.1f   dBm" % vswr.pf()
+    print "              VPR =  %5.2f  V"   % vpr
+    print "               PR = %5.1f   dBm" % vswr.pr()
+    print "             VSWR = %6.2f"       % vswr.vswr()
+    print "            Gamma =   %5.3f"     % vswr.gamma()
+    print "      Return Loss = %5.1f   dB"  % vswr.return_loss()
+    print "    Mismatch Loss =   %5.3f dB"  % vswr.mismatch_loss()
+    print "    Through power =  %5.2f  %%"  % (100.0*vswr.pf_rate())
+    print "  Reflected power =  %5.2f  %%"  % (100.0*vswr.pr_rate())
+
+s.close()
--- a/host/utils/umtrx_vswr.py
+++ b/host/utils/umtrx_vswr.py
@@ -0,0 +1,68 @@
+#!/usr/bin/env python
+# -*- coding: utf-8 -*-
+
+##########################
+###  VSWR calculations
+##########################
+
+# Implemented as described at:
+# http://www.markimicrowave.com/assets/data/return%20loss%20to%20vswr.pdf
+
+import math
+
+# TODO: requires better calibration
+TM10_VSWR_cal=0.3/2
+
+class umtrx_vswr:
+  def __init__(self, VPF, VPR, calibration=0, coef=0.05):
+    self.vpf = VPF
+    self.vpr = VPR
+    self.calibration = calibration
+    self.coef = coef
+    self._gamma = self._calc_gamma()
+
+  def _calc_gamma(self):
+    ''' Internal function: calculate Gamma '''
+    return math.pow(10, -self.return_loss()/20.0)
+
+  def pf(self):
+    ''' Estimated through power, dBm '''
+    return (self.vpf-self.calibration)/self.coef
+
+  def pr(self):
+    ''' Estimated reflected power, dBm '''
+    return (self.vpr-self.calibration)/self.coef
+
+  def return_loss(self):
+    ''' Estimated return loss, dB '''
+    return self.pf()-self.pr()
+
+  def gamma(self):
+    ''' Estimated Gamma '''
+    return self._gamma
+
+  def vswr(self):
+    ''' Estimated VSWR '''
+    gamma = self._gamma
+    if gamma == 1.0:
+      return float("inf")
+    else:
+      return (1+gamma)/(1-gamma)
+
+  def mismatch_loss(self):
+    ''' Estimated mismatch loss, dB '''
+    gamma = self._gamma
+    if gamma == 1.0:
+      return float("-inf")
+    else:
+      return -10.0 * math.log(1.0-gamma*gamma, 10)
+
+  def pf_rate(self):
+    ''' Estimated reflected power rate, % '''
+    gamma = self._gamma
+    return 1.0 - gamma*gamma
+
+  def pr_rate(self):
+    ''' Estimated reflected power rate, % '''
+    gamma = self._gamma
+    return gamma*gamma
--- a/host/utils/usrp_cal_utils.hpp
+++ b/host/utils/usrp_cal_utils.hpp
@@ -16,10 +16,16 @@
 //

 #include <uhd/utils/paths.hpp>
+#include <uhd/utils/thread_priority.hpp>
+#include <uhd/utils/algorithm.hpp>
+#include <uhd/utils/msg.hpp>
 #include <uhd/property_tree.hpp>
 #include <uhd/usrp/multi_usrp.hpp>
 #include <uhd/usrp/dboard_eeprom.hpp>
 #include <boost/filesystem.hpp>
+#include <boost/algorithm/string.hpp>
+#include <boost/thread/thread.hpp>
+#include <boost/math/special_functions/round.hpp>
 #include <iostream>
 #include <vector>
 #include <complex>
@@ -37,67 +43,9 @@ typedef std::complex<float> samp_type;
 **********************************************************************/
 static const double tau = 6.28318531;
 static const size_t wave_table_len = 8192;
-static const size_t num_search_steps = 5;
-static const size_t num_search_iters = 7;
 static const double default_freq_step = 1e6;
 static const size_t default_num_samps = 10000;

-/***********************************************************************
- * Set standard defaults for devices
- **********************************************************************/
-static inline void set_optimum_defaults(uhd::usrp::multi_usrp::sptr usrp){
-    uhd::property_tree::sptr tree = usrp->get_device()->get_tree();
-
-    const uhd::fs_path mb_path = "/mboards/0";
-    const std::string mb_name = tree->access<std::string>(mb_path / "name").get();
-    if (mb_name.find("USRP2") != std::string::npos or mb_name.find("N200") != std::string::npos or mb_name.find("N210") != std::string::npos){
-        usrp->set_tx_rate(12.5e6);
-        usrp->set_rx_rate(12.5e6);
-    }
-    else if (mb_name.find("UMTRX") != std::string::npos){
-        usrp->set_tx_rate(13e6/2);
-        usrp->set_tx_bandwidth(5e6);
-        usrp->set_rx_rate(13e6/2);
-        usrp->set_rx_bandwidth(5e6);
-    }
-    else if (mb_name.find("B100") != std::string::npos){
-        usrp->set_tx_rate(4e6);
-        usrp->set_rx_rate(4e6);
-    }
-    else if (mb_name.find("E100") != std::string::npos or mb_name.find("E110") != std::string::npos){
-        usrp->set_tx_rate(4e6);
-        usrp->set_rx_rate(8e6);
-    }
-    else{
-        throw std::runtime_error("self-calibration is not supported for this hardware");
-    }
-
-    const uhd::fs_path tx_fe_path = "/mboards/0/dboards/A/tx_frontends/0";
-    const std::string tx_name = tree->access<std::string>(tx_fe_path / "name").get();
-    if (tx_name.find("WBX") != std::string::npos or tx_name.find("SBX") != std::string::npos){
-        usrp->set_tx_gain(0);
-    }
-    else if (tx_name.find("LMS6002D") != std::string::npos){
-        usrp->set_tx_gain(10);
-    }
-    else{
-        throw std::runtime_error("self-calibration is not supported for this hardware");
-    }
-
-    const uhd::fs_path rx_fe_path = "/mboards/0/dboards/A/tx_frontends/0";
-    const std::string rx_name = tree->access<std::string>(rx_fe_path / "name").get();
-    if (rx_name.find("WBX") != std::string::npos or rx_name.find("SBX") != std::string::npos){
-        usrp->set_rx_gain(25);
-    }
-    else if (rx_name.find("LMS6002D") != std::string::npos){
-        usrp->set_rx_gain(10);
-    }
-    else{
-        throw std::runtime_error("self-calibration is not supported for this hardware");
-    }
-
-}
-
 /***********************************************************************
 * Sinusoid wave table
 **********************************************************************/
@@ -146,50 +94,91 @@ static inline void write_samples_to_file(
    outfile.close();
 }

+/***********************************************************************
+ * Retrieve d'board serial
+ **********************************************************************/
+static std::string get_serial(
+    uhd::usrp::multi_usrp::sptr usrp,
+    const std::string &tx_rx
+){
+    uhd::property_tree::sptr tree = usrp->get_device()->get_tree();
+    // Will work on 1st subdev, top-level must make sure it's the right one
+    uhd::usrp::subdev_spec_t subdev_spec = usrp->get_rx_subdev_spec();
+    const uhd::fs_path db_path = "/mboards/0/dboards/" + subdev_spec[0].db_name + "/" + tx_rx + "_eeprom";
+    const uhd::usrp::dboard_eeprom_t db_eeprom = tree->access<uhd::usrp::dboard_eeprom_t>(db_path).get();
+    return db_eeprom.serial;
+}
+
+/***********************************************************************
+ * Convert integer calibration values to floats
+ **********************************************************************/
+static double dc_offset_int2double(uint8_t corr)
+{
+    return (corr-128)/128.0;
+}
+
 /***********************************************************************
 * Store data to file
 **********************************************************************/
 static void store_results(
    uhd::usrp::multi_usrp::sptr usrp,
    const std::vector<result_t> &results,
-    const std::string &XX,
-    const std::string &xx,
-    const std::string &what,
-    const std::string &which
+    const std::string &rx_tx, // "tx" or "rx"
+    const std::string &what,  // Type of test, e.g. "iq"
+    bool append
 ){
-    //extract eeprom serial
-    uhd::property_tree::sptr tree = usrp->get_device()->get_tree();
-    const uhd::fs_path db_path = "/mboards/0/dboards/"+which+"/" + xx + "_eeprom";
-    const uhd::usrp::dboard_eeprom_t db_eeprom = tree->access<uhd::usrp::dboard_eeprom_t>(db_path).get();
-    if (db_eeprom.serial.empty()) throw std::runtime_error(XX + " dboard has empty serial!");
+    std::ofstream cal_data;
+    bool write_header=true;
+    std::string rx_tx_upper = boost::to_upper_copy(rx_tx);
+    std::string serial = get_serial(usrp, rx_tx);

    //make the calibration file path
    fs::path cal_data_path = fs::path(uhd::get_app_path()) / ".uhd";
    fs::create_directory(cal_data_path);
    cal_data_path = cal_data_path / "cal";
    fs::create_directory(cal_data_path);
-    cal_data_path = cal_data_path / str(boost::format("%s_%s_cal_v0.1_%s.csv") % xx % what % db_eeprom.serial);
+    cal_data_path = cal_data_path / str(boost::format("%s_%s_cal_v0.2_%s.csv") % rx_tx % what % serial);
    if (fs::exists(cal_data_path)){
-        fs::rename(cal_data_path, cal_data_path.string() + str(boost::format(".%d") % time(NULL)));
+        if (append)
+            write_header = false;
+        else
+            fs::rename(cal_data_path, cal_data_path.string() + str(boost::format(".%d") % time(NULL)));
    }

-    //fill the calibration file
-    std::ofstream cal_data(cal_data_path.string().c_str());
-    cal_data << boost::format("name, %s Frontend Calibration\n") % XX;
-    cal_data << boost::format("serial, %s\n") % db_eeprom.serial;
-    cal_data << boost::format("timestamp, %d\n") % time(NULL);
-    cal_data << boost::format("version, 0, 1\n");
-    cal_data << boost::format("DATA STARTS HERE\n");
-    cal_data << "lo_frequency, correction_real, correction_imag, measured, delta\n";
+    cal_data.open(cal_data_path.string().c_str(), std::ofstream::out | std::ofstream::app);
+
+    if (write_header)
+    {
+        //fill the calibration file
+        cal_data << boost::format("name, %s Frontend Calibration\n") % rx_tx_upper;
+        cal_data << boost::format("serial, %s\n") % serial;
+        cal_data << boost::format("timestamp, %d\n") % time(NULL);
+        cal_data << boost::format("version, 0, 1\n");
+        cal_data << boost::format("DATA STARTS HERE\n");
+        // For DC calibration we also store LMS6002D integer values
+        if (what == "dc")
+            cal_data << "lo_frequency, correction_real, correction_imag, measured, delta, int_i, int_q\n";
+        else
+            cal_data << "lo_frequency, correction_real, correction_imag, measured, delta\n";
+    }

    for (size_t i = 0; i < results.size(); i++){
-        cal_data
-            << results[i].freq << ", "
-            << results[i].real_corr << ", "
-            << results[i].imag_corr << ", "
-            << results[i].best << ", "
-            << results[i].delta << "\n"
-        ;
+        // Write to file
+        cal_data << results[i].freq;
+        if (what == "dc") {
+            cal_data << ", " << dc_offset_int2double(results[i].real_corr);
+            cal_data << ", " << dc_offset_int2double(results[i].imag_corr);
+        } else {
+            cal_data << ", " << results[i].real_corr;
+            cal_data << ", " << results[i].imag_corr;
+        }
+        cal_data << ", " << results[i].best;
+        cal_data << ", " << results[i].delta;
+        if (what == "dc") {
+            cal_data << ", " << results[i].real_corr;
+            cal_data << ", " << results[i].imag_corr;
+        }
+        cal_data << "\n";
    }

    std::cout << "wrote cal data to " << cal_data_path << std::endl;
@@ -234,3 +223,105 @@ static void capture_samples(
        throw std::runtime_error("did not get all the samples requested");
    }
 }
+
+/***********************************************************************
+ * Transmit thread
+ **********************************************************************/
+static void tx_thread(uhd::usrp::multi_usrp::sptr usrp, const double tx_wave_freq, const double tx_wave_ampl){
+    uhd::set_thread_priority_safe();
+
+    //create a transmit streamer
+    uhd::stream_args_t stream_args("fc32"); //complex floats
+    uhd::tx_streamer::sptr tx_stream = usrp->get_tx_stream(stream_args);
+
+    //setup variables and allocate buffer
+    uhd::tx_metadata_t md;
+    md.has_time_spec = false;
+    std::vector<samp_type> buff(tx_stream->get_max_num_samps()*10);
+
+    //values for the wave table lookup
+    size_t index = 0;
+    const double tx_rate = usrp->get_tx_rate();
+    const size_t step = boost::math::iround(wave_table_len * tx_wave_freq/tx_rate);
+    wave_table table(tx_wave_ampl);
+
+    //fill buff and send until interrupted
+    while (not boost::this_thread::interruption_requested()){
+        for (size_t i = 0; i < buff.size(); i++){
+            buff[i] = table(index += step);
+        }
+        tx_stream->send(&buff.front(), buff.size(), md);
+    }
+
+    //send a mini EOB packet
+    md.end_of_burst = true;
+    tx_stream->send("", 0, md);
+}
+
+/***********************************************************************
+ * Tune RX and TX routine
+ **********************************************************************/
+static double tune_rx_and_tx(uhd::usrp::multi_usrp::sptr usrp, const double tx_lo_freq, const double rx_offset){
+    //tune the transmitter with no cordic
+    uhd::tune_request_t tx_tune_req(tx_lo_freq);
+    tx_tune_req.dsp_freq_policy = uhd::tune_request_t::POLICY_MANUAL;
+    tx_tune_req.dsp_freq = 0;
+    usrp->set_tx_freq(tx_tune_req);
+
+    //tune the receiver
+    usrp->set_rx_freq(uhd::tune_request_t(usrp->get_tx_freq(), rx_offset));
+
+    boost::this_thread::sleep(boost::posix_time::milliseconds(10));
+    return usrp->get_tx_freq();
+}
+
+/***********************************************************************
+ * Setup function
+ **********************************************************************/
+static uhd::usrp::multi_usrp::sptr setup_usrp_for_cal(const std::string &args, const std::string &which, std::string &serial,
+                                                      int vga1_gain, int vga2_gain, int rx_gain, int verbose)
+{
+    std::cout << std::endl;
+    std::cout << boost::format("Creating the usrp device with: %s...") % args << std::endl;
+    uhd::usrp::multi_usrp::sptr usrp = uhd::usrp::multi_usrp::make(args);
+
+    // Do we have an UmTRX here?
+    uhd::property_tree::sptr tree = usrp->get_device()->get_tree();
+    const uhd::fs_path mb_path = "/mboards/0";
+    const std::string mb_name = tree->access<std::string>(mb_path / "name").get();
+    if (mb_name.find("UMTRX") == std::string::npos){
+        throw std::runtime_error("This utility supports only UmTRX hardware.");
+    }
+
+    //set subdev spec
+    usrp->set_rx_subdev_spec(which+":0");
+    usrp->set_tx_subdev_spec(which+":0");
+
+    UHD_MSG(status) << "Running calibration for " << usrp->get_tx_subdev_name(0) << std::endl;
+    serial = get_serial(usrp, "tx");
+    UHD_MSG(status) << "Daughterboard serial: " << serial << std::endl;
+
+    //set the antennas to cal
+    if (not uhd::has(usrp->get_rx_antennas(), "CAL") or not uhd::has(usrp->get_tx_antennas(), "CAL")){
+        throw std::runtime_error("This board does not have the CAL antenna option, cannot self-calibrate.");
+    }
+    usrp->set_rx_antenna("CAL");
+    usrp->set_tx_antenna("CAL");
+
+    //set optimum defaults
+    //  GSM symbol rate * 4
+    usrp->set_tx_rate(13e6/12);
+    usrp->set_rx_rate(13e6/12);
+    //  500kHz LPF
+    usrp->set_tx_bandwidth(1e6);
+    usrp->set_rx_bandwidth(1e6);
+    // Our recommended VGA1/VGA2
+    usrp->set_tx_gain(vga1_gain, "VGA1");
+    usrp->set_tx_gain(vga2_gain, "VGA2");
+    usrp->set_rx_gain(rx_gain);
+    if (verbose) printf("actual Tx VGA1 gain = %.0f dB\n", usrp->get_tx_gain("VGA1"));
+    if (verbose) printf("actual Tx VGA2 gain = %.0f dB\n", usrp->get_tx_gain("VGA2"));
+    if (verbose) printf("actual Rx gain = %.0f dB\n", usrp->get_rx_gain());
+
+    return usrp;
+}
--- a/images/u2plus_umtrx_v2.bin
+++ b/images/u2plus_umtrx_v2.bin
--- a/images/u2plus_umtrx_v2_4ddc.bin
+++ b/images/u2plus_umtrx_v2_4ddc.bin
--- a/images/u2plus_umtrx_v2_test_pa.bin
+++ b/images/u2plus_umtrx_v2_test_pa.bin
--- a/images/umtrx_txrx_uhd.bin
+++ b/images/umtrx_txrx_uhd.bin
--- a/zpu/umtrx/bootloader_utils.c
+++ b/zpu/umtrx/bootloader_utils.c
@@ -59,7 +59,7 @@ void start_program(void)

 void do_the_bootload_thing(void) {
 #ifdef NO_FLASH
-	puts("Starting USRP2+ without flash.");
+	puts("Starting UmTRX without flash.");
 	return;
 #else
 	spif_init(); //initialize SPI flash clock
@@ -71,8 +71,8 @@ void do_the_bootload_thing(void) {
 	set_safe_booted_flag(0); //haven't booted yet
 	
 	if(BUTTON_PUSHED) { //see memory_map.h
-		puts("Starting USRP2+ in safe mode. Loading safe firmware.");
-        return;
+		puts("Starting UmTRX in safe mode. Loading safe firmware.");
+		return;
 	}
 	
 	if(!production_image) {
@@ -88,7 +88,7 @@ void do_the_bootload_thing(void) {
 #endif
 		}
 		puts("No valid production FPGA image found.\n");
-//		return;
+		return;
 	}
 	if(is_valid_fw_image(PROD_FW_IMAGE_LOCATION_ADDR)) {
 		puts("Valid production firmware found. Loading...");
@@ -107,22 +107,5 @@ void do_the_bootload_thing(void) {
 		return;
 	}
 	puts("No valid production firmware found. Falling through to built-in firmware.");
-	/*
-	if(is_valid_fw_image(SAFE_FW_IMAGE_LOCATION_ADDR)) {
-		spi_flash_read(SAFE_FW_IMAGE_LOCATION_ADDR, FW_IMAGE_SIZE_BYTES, (void *)RAM_BASE);
-		puts("Finished loading. Starting image.");
-		mdelay(300);
-		start_program();
-		puts("ERROR: return from main program! This should never happen!");
-		mdelay(300);
-#ifdef SPARTAN6
-		icap_s6_reload_fpga(SAFE_FPGA_IMAGE_LOCATION_ADDR, SAFE_FPGA_IMAGE_LOCATION_ADDR);
-#else
-		icap_s3_reload_fpga(SAFE_FPGA_IMAGE_LOCATION_ADDR);
-#endif
-		return;
-	}
-    puts("ERROR: no safe firmware image available. Falling through to built-in firmware.");
-    */
 #endif
 }
Author	SHA1	Message	Date
Josh Blum	7b1348ee97	fpga: bump compat minor, work on late flag	2015-07-22 20:05:19 -07:00
Josh Blum	63e2ee1967	fpga: implement fifo control tracking info * detect loss host to device, and device to host * warn on near fifo capacity * added time wait flag (replaces tsf for waiting) * added skip late flag (implementation TODO)	2015-07-22 18:14:04 -07:00
Josh Blum	89394c9a58	fpga: larger long fifo with 64 entries	2015-07-22 13:01:10 -07:00
Alexander Chemeris	e6b82c85e6	debian: 1.0.4 release changelog.	2015-07-21 21:09:25 -04:00
Alexander Chemeris	8e5b9e8cba	utils: Prettier output for umtrx_auto_calibration	2015-07-21 21:09:25 -04:00
Alexander Chemeris	fc9ecf7709	host: Fix a typo in the DC offset property tree setter.	2015-07-21 21:09:25 -04:00
Alexander Chemeris	913f19357b	utils: Verify that calibration property has been set correctly. Sometimes setting an LMS register fails if UmTRX has bad power supply. We want to make sure we catch this situation and abort calibration.	2015-07-21 18:48:43 -04:00
Alexander Chemeris	d96cea8000	utils: Set default Rx gain to 50 instead of 100 in calibration utils. A few commits ago we changed Rx gain to real dB instead of abstract values, which changed the gain settings range - old 100 is about current 50.	2015-07-21 00:38:09 -04:00
Alexander Chemeris	c401071ea6	scripts: Fix a nasty typo in umtrx_auto_calibration. We were executing each calibration comand twice, because $echo was not defined.	2015-07-20 22:43:01 -04:00
Josh Blum	b5b351e535	debian: split umtrx into module and runtime packages * uhd-umtrx for uhd plugin module only (multi-arch lib dir) * umtrx - runtime utility applications (depends on uhd-umtrx) The idea is to support multi-arch installs by separating out the plugin module (which can exist in a multi-arch install) from the /usr/bin/ executables. It may also be useful for users to have a minimal install (plugin only).	2015-07-12 00:02:27 -07:00
Josh Blum	1cf16e57f7	host: fixed missing boost math include (boost 1.46) usrp_cal_utils.hpp used boost round but did not include the header. This caused a build error on ubuntu 12.04 LTS w/ boost boost 1.46	2015-07-10 14:30:39 -07:00
Alexander Chemeris	b78a96661a	host: FIx SET handling for the property tree JSON API.	2015-07-05 19:30:13 -04:00
Alexander Chemeris	5452567fd9	host: There is no need to explicitely support coerce() in property_alias() Coerce is called automatically inside of the set() of the original property.	2015-07-05 12:47:56 -04:00
Alexander Chemeris	47b3e1aaea	host: Complete calculations for VSWR in Python utils + better sensors output.	2015-07-05 10:01:37 -04:00
Alexander Chemeris	1e042157be	Merge branch 'status_monitor' Implements a TCP server inside UHD which gives access to a device's property tree through a JSON API.	2015-07-04 19:27:14 -04:00
Alexander Chemeris	4cb89755bb	host: A Python library for the property tree API and sensors query utility.	2015-07-04 19:19:39 -04:00
Alexander Chemeris	efba897843	host: No need to explicitely insert EOL, it's already there.	2015-07-04 19:19:39 -04:00
Alexander Chemeris	35ccac9f54	host: Fix typo in a comment s/GET/SET/.	2015-07-04 19:19:39 -04:00
Josh Blum	963f3e90dc	umtrx: remove sleep used for testing	2015-07-04 19:19:39 -04:00
Josh Blum	0e8abb2068	umtrx: generic JSON property tree service	2015-07-04 19:19:39 -04:00
Josh Blum	e069b6d39c	umtrx: client handler thread to keep socket open	2015-07-04 19:19:39 -04:00
Josh Blum	28f423567b	umtrx: changes to tcp query server * tcp query server is on its own thread * tcp query take full sensor path (simpler) * select on client socket to wait for data	2015-07-04 19:19:39 -04:00
Josh Blum	67303bcbcc	umtrx: mutex for i2c-based interfaces	2015-07-04 19:19:38 -04:00
Josh Blum	0fc60d2275	umtrx: sensor query support and comments	2015-07-04 19:19:38 -04:00
Josh Blum	ce5f31f713	umtrx: mutex for lms ctrl wrapper class	2015-07-04 19:19:38 -04:00
Josh Blum	802b24c565	umtrx: work on status monitor tcp server	2015-07-04 19:19:38 -04:00
Josh Blum	56c4174ad4	umtrx: skeleton for status monitor thread	2015-07-04 19:19:38 -04:00
Alexander Chemeris	0073096b27	Merge branch 'achemeris/divsw'	2015-07-04 19:14:26 -04:00
Alexander Chemeris	7727cd283c	host: By default route each Rx channel to it's own antenna.	2015-07-04 19:14:10 -04:00
Alexander Chemeris	ff13c7d73a	host: Add ability to set diversity switches position from UHD args. Diviersity switch controls are also aliased RF frontends property subtrees now.	2015-07-04 19:12:34 -04:00
Alexander Chemeris	0bee662b81	host: Implement property_alias() function which creates an alias at the proprty tree.	2015-07-04 19:01:23 -04:00
Kirill Zakharenko	7b955574a5	minor debianization fixes: +x debian/rules, correct debian/source/format	2015-06-29 11:45:45 +03:00
Josh Blum	4b102f0c4c	Merge branch 'debian'	2015-06-20 16:45:07 -07:00
Josh Blum	0d7b517923	debian: changelog entry for 1.0.3 release	2015-06-20 16:44:57 -07:00
Josh Blum	aec754eb07	umtrx: strip leading g from describe hash	2015-06-04 20:44:31 -04:00
Alexander Chemeris	756cb9a74c	utils: Better documentation for umtrx_auto_calibration.	2015-06-03 13:51:32 -04:00
Alexander Chemeris	0b105893a4	Merge branch 'achemeris/iq_cal_work' implementing Tx IQ calibration.	2015-05-28 17:34:56 -04:00
Josh Blum	41b93944a0	fpga: move tx frontend mux between DSP and corrections module On the RX side, the same mux is between the corrections and the DSP. However, for TX, this was between the DAC and corrections module, leading to the host code setting the wrong corrections when the channel 0 was set to frontend mapping "B:0". This fixes the issue with the tx iq calibration utility. A new fpga image is checked in and compat minor bumped.	2015-05-28 17:33:00 -04:00
Alexander Chemeris	a872102cd9	host: Fix UHD args in the umtrx_auto_calibration.	2015-05-28 17:33:00 -04:00
Alexander Chemeris	89277c6e56	host: Add missing new line in the calibration utils output.	2015-05-28 17:32:59 -04:00
Alexander Chemeris	1773223b81	host: Improve console output for calibration utilities.	2015-05-28 17:32:59 -04:00
Alexander Chemeris	24527ece28	host: Use "fifo_ctrl_window=0" UHD param in the umtrx_auto_calibration.	2015-05-28 17:32:59 -04:00
Alexander Chemeris	7834aa4709	host: Better reporting at the end of umtrx_auto_calibration	2015-05-28 17:32:59 -04:00
Alexander Chemeris	f61d102791	host: Checking in umtrx_auto_calibration script. The script is a shortcut to run UmTRX calibration for a selected band.	2015-05-28 17:32:59 -04:00
Alexander Chemeris	d8b282404b	host: An attempt to get IQ balance caliration working with the 2nd channel. The 2nd channel calibration still doesn't work, but I thought this code is useful anyway to unify DC and IQ calibratoin code.	2015-05-28 17:30:32 -04:00
Alexander Chemeris	4cd94528aa	host: Correctly store IQ balance calibration values.	2015-05-28 17:30:31 -04:00
Alexander Chemeris	fb59ec9bd2	host: Better default values for umtrx_cal_tx_iq_balance.	2015-05-28 17:30:31 -04:00
Alexander Chemeris	9577f31bfb	host: Checking in umtrx_cal_tx_iq_balance utility.	2015-05-28 17:30:31 -04:00
Alexander Chemeris	df513b81e5	host: Move more generic functions to usrp_cal_utils.hpp	2015-05-28 17:30:31 -04:00
Josh Blum	471eedbb6a	debian: first shot at umtrx debianization	2015-05-26 17:12:04 -07:00
Alexander Chemeris	10e758be8c	host: Implement setting Rx VGA1 gain in real dBs.	2015-05-20 12:21:29 -04:00
Alexander Chemeris	9c20b295d5	host: Fix whitespaces.	2015-05-20 12:17:00 -04:00
Alexander Chemeris	14e58af929	host: Implement power control below the PA minimum output power using LMS VGA.	2015-05-18 02:06:05 -04:00
Alexander Chemeris	9a752069e7	host: Output all known PA types on startup.	2015-05-18 00:26:10 -04:00
Alexander Chemeris	283dae8214	host: Implement functions to list all known PA types.	2015-05-18 00:17:44 -04:00
Alexander Chemeris	df90e2b342	host: Replace 'pa_power_limit' param with 'pa_power_max_w' and 'pa_power_max_dbm'.	2015-05-18 00:16:31 -04:00
Alexander Chemeris	0b1c002f32	host: Add utils to read NMEA and GPS coordinates from UmTRX.	2015-05-16 01:10:39 -04:00
Alexander Chemeris	313488b2d3	host: Fix umtrx_cal_tx_dc_offset help output to mention UmTRX.	2015-05-09 22:35:55 -04:00
Alexander Chemeris	189828f29c	Merge branch 'achemeris/pa_control'	2015-05-09 01:17:11 -04:00
Alexander Chemeris	f913c39c0c	host: Checking in a full scale DCDC conversion table.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	84c5426fd8	host: Delay between DCDC setting and reading it back is not necessary when there is a PA installed.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	ac22360125	host: Enable DCDC converter before setting its value.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	6bf16b4e66	host: Give DCDC converter time to settle when we set PA output power.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	451cc221be	host: UHD uses dB for gains, not Watts.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	73ab35d46c	host: Implement case insensitive PA type comparison.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	a189138078	host: Better status message	2015-05-09 01:16:52 -04:00
Alexander Chemeris	2d83e6caed	host: Output a status message when PA power is limited by a configuration parameter.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	9becc6bdf8	host: Implement PA output power limit parameter.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	a5cee8c757	host: Fix power_amp_impl::max_power() implementation.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	5001cb8f95	host: Fix crash and beautift code.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	1337b13d56	host: Move power amp code into a separate class.	2015-05-09 01:16:52 -04:00
Alexander Chemeris	93aaef643d	Initial implementation of the power control for UmTRX+PA systems.	2015-05-09 01:16:52 -04:00
Josh Blum	a33b3e92e4	umtrx: support dirty version marker when tree is unclean	2015-05-07 20:54:22 -07:00
Josh Blum	08c05c5f1b	umtrx: add fifo_ctrl_window argument to specify window size This is for debugging issues with the fifo control on some systems which are seeing missing packets. Running with --args="fifo_ctrl_window=0" will set the window size to nothing, which acks all outgoing packets ASAP.	2015-05-07 19:44:39 -07:00
Alexander Chemeris	000a874189	host: Update copyright for umtrx_cal_tx_dc_offset.cpp.	2015-05-07 20:11:06 -04:00
Alexander Chemeris	7b15bc857b	Merge branch 'achemeris/dc_offset_work'	2015-05-07 20:07:08 -04:00
Alexander Chemeris	e14c900821	host: Use amplitude setting for Dc offset calibration. If we want 0 amplitude, we can set this with the command line parameter.	2015-05-07 20:05:39 -04:00
Alexander Chemeris	271b8a045e	host: Better algorithm for Dc offset compensation search.	2015-05-07 19:42:04 -04:00
Alexander Chemeris	30a4557825	host: Improvements in the dc_cal_t abstraction.	2015-05-07 19:11:59 -04:00
Alexander Chemeris	32f82d646b	host: Actually test dc_i/q_stop values.	2015-05-07 19:02:11 -04:00
Alexander Chemeris	c3754d5048	host: Better abstraction for dc calibration routines.	2015-05-07 19:01:02 -04:00
Alexander Chemeris	052a817f30	host: More verbose logging about calibration files loading.	2015-05-07 18:00:55 -04:00
Alexander Chemeris	8e92e8ca43	host: Store calibration file in a new way.	2015-05-07 18:00:25 -04:00
Alexander Chemeris	e64d3d5940	host: Update automatic DC calibration utility. This verion of the DC calibration utility delivers predictable calibration results, almost as good as manual calibration with a spectrum analyzer. New features include writing calibration to a file in a format supported by the UHD, as well as single run with measurement output to stdout.	2015-05-07 17:35:35 -04:00
Alexander Chemeris	158077c504	host: Fix loading of DC offset calibration values from EEPROM.	2015-04-29 22:45:05 -04:00
Josh Blum	84ef0be96c	Merge branch 'win_fixes'	2015-04-27 20:56:57 -07:00
Josh Blum	84330517e5	Merge branch 'version_info'	2015-04-27 20:56:41 -07:00
Josh Blum	72062b1466	Merge branch 'dc_offset_debug' Conflicts: host/umtrx_impl.cpp	2015-04-27 20:54:59 -07:00
Josh Blum	453caf23e8	umtrx: updated binaries after bootloader work	2015-04-27 17:21:01 -07:00
Josh Blum	b671b8f8b1	umtrx: use portable sleeps from boost	2015-04-27 17:01:05 -07:00
Josh Blum	b98d250be2	umtrx: switch to portable stdint.h include	2015-04-27 17:00:30 -07:00
Josh Blum	bf366bb7ae	umtrx: remove misused class declspec UHD_API	2015-04-27 16:59:09 -07:00
Josh Blum	624f089dcb	umtrx: provided nan() function for MSVC 2012	2015-04-27 16:56:35 -07:00
Josh Blum	6af61a7cab	umtrx: parse and print version info from git	2015-04-27 15:38:01 -07:00
Alexander Chemeris	99a409192e	images: Remove _test_pa image. All its features are already in the master.	2015-04-27 16:25:44 -04:00
Alexander Chemeris	ce92a2f47a	host: Fix PLL lock detection - only 0x00 value is correct according to the LMS6002d documentation.	2015-04-27 10:35:53 -04:00
Alexander Chemeris	cbb5815fe0	host: Make non-interface functions of lms6002d_ctrl_impl class protected for better abstraction.	2015-04-27 00:06:37 -04:00
Alexander Chemeris	108f250bf9	host: Fix debug output.	2015-04-27 00:06:09 -04:00
Alexander Chemeris	7e5cfac7af	host: Implement lo_locked sensor to show whether LMS PLL is actually locked.	2015-04-27 00:05:04 -04:00
Alexander Chemeris	8b7cb405f1	zpu: Bump fw minor version for the bootloader behavior change.	2015-04-26 23:24:06 -04:00
Alexander Chemeris	6ded41c3fd	zpu: Don't confuse users telling USRP2 is loading - it's UmTRX they have!	2015-04-26 23:19:22 -04:00
Alexander Chemeris	fd2493f8fe	zpu: Do not attempt to load production ZPU firmware from safe FPGA image. This is almost always a bad idea and can lead to weird issues if you have produciton ZPU firmware which is incompatible with your safe FPGA image.	2015-04-26 23:09:47 -04:00
Josh Blum	34ac1cc22c	umtrx: command line options for cal app	2014-11-05 14:47:35 -08:00
Josh Blum	3eb1fe8b46	umtrx: produce cal files from script	2014-11-05 14:25:25 -08:00
Josh Blum	ef99dbc9cb	umtrx: added goodness plot, cleanup	2014-11-05 02:49:36 -08:00
Josh Blum	49921fe4ef	umtrx: plot validation dc power using sparse corrections values	2014-11-05 00:21:31 -08:00
Josh Blum	04d08ea43b	umtrx: umtrx_cal_tx_dc_offset in python for tweaks	2014-11-04 23:02:48 -08:00
Josh Blum	8a900aab52	Merge branch 'umtrx_update' into dc_offset_debug	2014-10-29 13:42:07 -04:00
Josh Blum	ca98bfda97	umtrx: move dc_offset plugin to bottom	2014-10-29 12:20:49 -04:00
Josh Blum	96829b2e5a	umtrx: plugin lms dc offset into fe corrections tree	2014-10-29 12:14:54 -04:00